mt7981b-cudy-wr3000-v1.dts 4.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/leds/common.h>
  4. #include "mt7981.dtsi"
  5. / {
  6. model = "Cudy WR3000 v1";
  7. compatible = "cudy,wr3000-v1", "mediatek,mt7981";
  8. aliases {
  9. ethernet0 = &gmac0;
  10. label-mac-device = &gmac0;
  11. led-boot = &led_status;
  12. led-failsafe = &led_status;
  13. led-running = &led_status;
  14. led-upgrade = &led_status;
  15. serial0 = &uart0;
  16. };
  17. chosen {
  18. stdout-path = "serial0:115200n8";
  19. };
  20. gpio-keys {
  21. compatible = "gpio-keys";
  22. reset {
  23. label = "reset";
  24. linux,code = <KEY_RESTART>;
  25. gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  26. };
  27. wps {
  28. label = "wps";
  29. linux,code = <KEY_WPS_BUTTON>;
  30. gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  31. };
  32. };
  33. leds {
  34. compatible = "gpio-leds";
  35. led_status: led@0 {
  36. function = LED_FUNCTION_STATUS;
  37. color = <LED_COLOR_ID_BLUE>;
  38. gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  39. };
  40. led@1 {
  41. label = "blue:internet";
  42. gpios = <&pio 11 GPIO_ACTIVE_LOW>;
  43. };
  44. led@2 {
  45. function = LED_FUNCTION_WAN;
  46. color = <LED_COLOR_ID_BLUE>;
  47. gpios = <&pio 5 GPIO_ACTIVE_LOW>;
  48. };
  49. led@3 {
  50. function = LED_FUNCTION_LAN;
  51. color = <LED_COLOR_ID_BLUE>;
  52. gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  53. };
  54. led@4 {
  55. label = "blue:wifi2";
  56. gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  57. linux,default-trigger = "phy0tpt";
  58. };
  59. led@5 {
  60. label = "blue:wifi5";
  61. gpios = <&pio 7 GPIO_ACTIVE_LOW>;
  62. linux,default-trigger = "phy1tpt";
  63. };
  64. };
  65. };
  66. &uart0 {
  67. status = "okay";
  68. };
  69. &watchdog {
  70. status = "okay";
  71. };
  72. &eth {
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&mdio_pins>;
  75. status = "okay";
  76. gmac0: mac@0 {
  77. compatible = "mediatek,eth-mac";
  78. reg = <0>;
  79. phy-mode = "2500base-x";
  80. nvmem-cell-names = "mac-address";
  81. nvmem-cells = <&macaddr_bdinfo_de00 0>;
  82. fixed-link {
  83. speed = <2500>;
  84. full-duplex;
  85. pause;
  86. };
  87. };
  88. gmac1: mac@1 {
  89. compatible = "mediatek,eth-mac";
  90. reg = <1>;
  91. status = "disabled";
  92. };
  93. };
  94. &mdio_bus {
  95. switch: switch@1f {
  96. compatible = "mediatek,mt7531";
  97. reg = <31>;
  98. reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
  99. };
  100. };
  101. &spi0 {
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&spi0_flash_pins>;
  104. status = "disabled";
  105. };
  106. &spi2 {
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&spi2_flash_pins>;
  109. status = "okay";
  110. flash@0 {
  111. #address-cells = <1>;
  112. #size-cells = <1>;
  113. compatible = "jedec,spi-nor";
  114. reg = <0>;
  115. spi-max-frequency = <25000000>;
  116. spi-tx-bus-width = <4>;
  117. spi-rx-bus-width = <4>;
  118. partitions {
  119. compatible = "fixed-partitions";
  120. #address-cells = <1>;
  121. #size-cells = <1>;
  122. partition@00000 {
  123. label = "BL2";
  124. reg = <0x00000 0x40000>;
  125. read-only;
  126. };
  127. partition@40000 {
  128. label = "u-boot-env";
  129. reg = <0x40000 0x10000>;
  130. read-only;
  131. };
  132. factory: partition@50000 {
  133. label = "Factory";
  134. reg = <0x50000 0x10000>;
  135. read-only;
  136. };
  137. bdinfo: partition@60000 {
  138. label = "bdinfo";
  139. reg = <0x60000 0x10000>;
  140. read-only;
  141. nvmem-layout {
  142. compatible = "fixed-layout";
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. macaddr_bdinfo_de00: macaddr@de00 {
  146. compatible = "mac-base";
  147. reg = <0xde00 0x6>;
  148. #nvmem-cell-cells = <1>;
  149. };
  150. };
  151. };
  152. partition@70000 {
  153. label = "FIP";
  154. reg = <0x70000 0x80000>;
  155. read-only;
  156. };
  157. partition@f0000 {
  158. compatible = "denx,fit";
  159. label = "firmware";
  160. reg = <0xf0000 0xf10000>;
  161. };
  162. };
  163. };
  164. };
  165. &pio {
  166. spi0_flash_pins: spi0-pins {
  167. mux {
  168. function = "spi";
  169. groups = "spi0", "spi0_wp_hold";
  170. };
  171. };
  172. spi2_flash_pins: spi2-pins {
  173. mux {
  174. function = "spi";
  175. groups = "spi2", "spi2_wp_hold";
  176. };
  177. conf-pu {
  178. pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
  179. drive-strength = <8>;
  180. bias-pull-up = <103>;
  181. };
  182. conf-pd {
  183. pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  184. drive-strength = <8>;
  185. bias-pull-down = <103>;
  186. };
  187. };
  188. };
  189. &switch {
  190. ports {
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. port@0 {
  194. reg = <0>;
  195. label = "wan";
  196. nvmem-cell-names = "mac-address";
  197. nvmem-cells = <&macaddr_bdinfo_de00 1>;
  198. };
  199. port@1 {
  200. reg = <1>;
  201. label = "lan1";
  202. };
  203. port@2 {
  204. reg = <2>;
  205. label = "lan2";
  206. };
  207. port@3 {
  208. reg = <3>;
  209. label = "lan3";
  210. };
  211. port@6 {
  212. reg = <6>;
  213. label = "cpu";
  214. ethernet = <&gmac0>;
  215. phy-mode = "2500base-x";
  216. fixed-link {
  217. speed = <2500>;
  218. full-duplex;
  219. pause;
  220. };
  221. };
  222. };
  223. };
  224. &wifi {
  225. status = "okay";
  226. mediatek,mtd-eeprom = <&factory 0x0>;
  227. };