qcom-ipq4028-wpj428.dts 5.0 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017, Christian Mehlis <[email protected]>
  3. * Copyright (c) 2017-2018, Sven Eckelmann <[email protected]>
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. *
  17. */
  18. #include "qcom-ipq4019.dtsi"
  19. #include <dt-bindings/gpio/gpio.h>
  20. #include <dt-bindings/input/input.h>
  21. #include <dt-bindings/soc/qcom,tcsr.h>
  22. / {
  23. model = "Compex WPJ428";
  24. compatible = "compex,wpj428", "qcom,ipq4019";
  25. soc {
  26. mdio@90000 {
  27. status = "okay";
  28. };
  29. ess-psgmii@98000 {
  30. status = "okay";
  31. };
  32. tcsr@194b000 {
  33. /* select hostmode */
  34. compatible = "qcom,tcsr";
  35. reg = <0x194b000 0x100>;
  36. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  37. status = "okay";
  38. };
  39. tcsr@1949000 {
  40. compatible = "qcom,tcsr";
  41. reg = <0x1949000 0x100>;
  42. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  43. };
  44. ess_tcsr@1953000 {
  45. compatible = "qcom,tcsr";
  46. reg = <0x1953000 0x1000>;
  47. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  48. };
  49. tcsr@1957000 {
  50. compatible = "qcom,tcsr";
  51. reg = <0x1957000 0x100>;
  52. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  53. };
  54. usb2: usb2@60f8800 {
  55. status = "okay";
  56. };
  57. usb3: usb3@8af8800 {
  58. status = "okay";
  59. };
  60. crypto@8e3a000 {
  61. status = "okay";
  62. };
  63. watchdog@b017000 {
  64. status = "okay";
  65. };
  66. ess-switch@c000000 {
  67. switch_lan_bmp = <0x10>;
  68. switch_wan_bmp = <0x20>;
  69. status = "okay";
  70. };
  71. edma@c080000 {
  72. status = "okay";
  73. };
  74. };
  75. keys {
  76. compatible = "gpio-keys";
  77. reset {
  78. label = "reset";
  79. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  80. linux,code = <KEY_RESTART>;
  81. };
  82. };
  83. aliases {
  84. led-boot = &status;
  85. led-failsafe = &status;
  86. led-upgrade = &status;
  87. };
  88. leds {
  89. compatible = "gpio-leds";
  90. status: rss4 {
  91. label = "wpj428:green:rss4";
  92. gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
  93. };
  94. rss3 {
  95. label = "wpj428:green:rss3";
  96. gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  97. };
  98. };
  99. beeper: beeper {
  100. compatible = "gpio-beeper";
  101. gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
  102. };
  103. };
  104. &tlmm {
  105. serial_pins: serial_pinmux {
  106. mux {
  107. pins = "gpio60", "gpio61";
  108. function = "blsp_uart0";
  109. bias-disable;
  110. };
  111. };
  112. spi_0_pins: spi_0_pinmux {
  113. pin {
  114. function = "blsp_spi0";
  115. pins = "gpio55", "gpio56", "gpio57";
  116. drive-strength = <12>;
  117. bias-disable;
  118. };
  119. pin_cs {
  120. function = "gpio";
  121. pins = "gpio54";
  122. drive-strength = <2>;
  123. bias-disable;
  124. output-high;
  125. };
  126. };
  127. };
  128. &blsp_dma {
  129. status = "okay";
  130. };
  131. &blsp1_spi1 {
  132. pinctrl-0 = <&spi_0_pins>;
  133. pinctrl-names = "default";
  134. status = "okay";
  135. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  136. m25p80@0 {
  137. #address-cells = <1>;
  138. #size-cells = <1>;
  139. compatible = "jedec,spi-nor";
  140. reg = <0>;
  141. spi-max-frequency = <24000000>;
  142. partitions {
  143. compatible = "fixed-partitions";
  144. #address-cells = <1>;
  145. #size-cells = <1>;
  146. partition0@0 {
  147. label = "0:SBL1";
  148. reg = <0x00000000 0x00040000>;
  149. read-only;
  150. };
  151. partition1@40000 {
  152. label = "0:MIBIB";
  153. reg = <0x00040000 0x00020000>;
  154. read-only;
  155. };
  156. partition2@60000 {
  157. label = "0:QSEE";
  158. reg = <0x00060000 0x00060000>;
  159. read-only;
  160. };
  161. partition3@c0000 {
  162. label = "0:CDT";
  163. reg = <0x000c0000 0x00010000>;
  164. read-only;
  165. };
  166. partition4@d0000 {
  167. label = "0:DDRPARAMS";
  168. reg = <0x000d0000 0x00010000>;
  169. read-only;
  170. };
  171. partition5@e0000 {
  172. label = "0:APPSBLENV"; /* uboot env*/
  173. reg = <0x000e0000 0x00010000>;
  174. read-only;
  175. };
  176. partition5@f0000 {
  177. label = "0:APPSBL"; /* uboot */
  178. reg = <0x000f0000 0x00080000>;
  179. read-only;
  180. };
  181. partition5@170000 {
  182. label = "0:ART";
  183. reg = <0x00170000 0x00010000>;
  184. read-only;
  185. };
  186. partition6@180000 {
  187. compatible = "denx,fit";
  188. label = "firmware";
  189. reg = <0x00180000 0x01e80000>;
  190. };
  191. };
  192. };
  193. };
  194. &blsp1_uart1 {
  195. pinctrl-0 = <&serial_pins>;
  196. pinctrl-names = "default";
  197. status = "okay";
  198. };
  199. &cryptobam {
  200. status = "okay";
  201. };
  202. &gmac0 {
  203. qcom,phy_mdio_addr = <4>;
  204. qcom,poll_required = <1>;
  205. qcom,forced_speed = <1000>;
  206. qcom,forced_duplex = <1>;
  207. vlan_tag = <2 0x20>;
  208. };
  209. &gmac1 {
  210. qcom,phy_mdio_addr = <3>;
  211. qcom,poll_required = <1>;
  212. qcom,forced_speed = <1000>;
  213. qcom,forced_duplex = <1>;
  214. vlan_tag = <1 0x10>;
  215. };
  216. &usb3_ss_phy {
  217. status = "okay";
  218. };
  219. &usb3_hs_phy {
  220. status = "okay";
  221. };
  222. &usb2_hs_phy {
  223. status = "okay";
  224. };
  225. &wifi0 {
  226. status = "okay";
  227. };
  228. &wifi1 {
  229. status = "okay";
  230. };