qcom-ipq8065-r7800.dts 11 KB

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  1. #include "qcom-ipq8065-v1.0.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "Netgear Nighthawk X4S R7800";
  5. compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. reserved-memory {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges;
  14. rsvd@41200000 {
  15. reg = <0x41200000 0x300000>;
  16. no-map;
  17. };
  18. rsvd@5fe00000 {
  19. reg = <0x5fe00000 0x200000>;
  20. reusable;
  21. };
  22. };
  23. aliases {
  24. serial0 = &gsbi4_serial;
  25. mdio-gpio0 = &mdio0;
  26. led-boot = &power_white;
  27. led-failsafe = &power_amber;
  28. led-running = &power_white;
  29. led-upgrade = &power_amber;
  30. };
  31. chosen {
  32. linux,stdout-path = "serial0:115200n8";
  33. };
  34. soc {
  35. pinmux@800000 {
  36. button_pins: button_pins {
  37. mux {
  38. pins = "gpio6", "gpio54", "gpio65";
  39. function = "gpio";
  40. drive-strength = <2>;
  41. bias-pull-up;
  42. };
  43. };
  44. i2c4_pins: i2c4_pinmux {
  45. mux {
  46. pins = "gpio12", "gpio13";
  47. function = "gsbi4";
  48. drive-strength = <12>;
  49. bias-disable;
  50. };
  51. };
  52. led_pins: led_pins {
  53. pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
  54. "gpio24","gpio26", "gpio53", "gpio64";
  55. function = "gpio";
  56. drive-strength = <2>;
  57. bias-pull-down;
  58. };
  59. nand_pins: nand_pins {
  60. mux {
  61. pins = "gpio34", "gpio35", "gpio36",
  62. "gpio37", "gpio38", "gpio39",
  63. "gpio40", "gpio41", "gpio42",
  64. "gpio43", "gpio44", "gpio45",
  65. "gpio46", "gpio47";
  66. function = "nand";
  67. drive-strength = <10>;
  68. bias-disable;
  69. };
  70. pullups {
  71. pins = "gpio39";
  72. bias-pull-up;
  73. };
  74. hold {
  75. pins = "gpio40", "gpio41", "gpio42",
  76. "gpio43", "gpio44", "gpio45",
  77. "gpio46", "gpio47";
  78. bias-bus-hold;
  79. };
  80. };
  81. mdio0_pins: mdio0_pins {
  82. mux {
  83. pins = "gpio0", "gpio1";
  84. function = "gpio";
  85. drive-strength = <8>;
  86. bias-disable;
  87. };
  88. clk {
  89. pins = "gpio1";
  90. input-disable;
  91. };
  92. };
  93. rgmii2_pins: rgmii2_pins {
  94. mux {
  95. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  96. "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  97. function = "rgmii2";
  98. drive-strength = <8>;
  99. bias-disable;
  100. };
  101. tx {
  102. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  103. input-disable;
  104. };
  105. };
  106. spi_pins: spi_pins {
  107. mux {
  108. pins = "gpio18", "gpio19", "gpio21";
  109. function = "gsbi5";
  110. bias-pull-down;
  111. };
  112. data {
  113. pins = "gpio18", "gpio19";
  114. drive-strength = <10>;
  115. };
  116. cs {
  117. pins = "gpio20";
  118. drive-strength = <10>;
  119. bias-pull-up;
  120. };
  121. clk {
  122. pins = "gpio21";
  123. drive-strength = <12>;
  124. };
  125. };
  126. spi6_pins: spi6_pins {
  127. mux {
  128. pins = "gpio55", "gpio56", "gpio58";
  129. function = "gsbi6";
  130. bias-pull-down;
  131. };
  132. mosi {
  133. pins = "gpio55";
  134. drive-strength = <12>;
  135. };
  136. miso {
  137. pins = "gpio56";
  138. drive-strength = <14>;
  139. };
  140. cs {
  141. pins = "gpio57";
  142. drive-strength = <12>;
  143. bias-pull-up;
  144. };
  145. clk {
  146. pins = "gpio58";
  147. drive-strength = <12>;
  148. };
  149. reset {
  150. pins = "gpio33";
  151. drive-strength = <10>;
  152. bias-pull-down;
  153. output-high;
  154. };
  155. };
  156. usb0_pwr_en_pins: usb0_pwr_en_pins {
  157. mux {
  158. pins = "gpio15";
  159. function = "gpio";
  160. drive-strength = <12>;
  161. bias-pull-down;
  162. output-high;
  163. };
  164. };
  165. usb1_pwr_en_pins: usb1_pwr_en_pins {
  166. mux {
  167. pins = "gpio16", "gpio68";
  168. function = "gpio";
  169. drive-strength = <12>;
  170. bias-pull-down;
  171. output-high;
  172. };
  173. };
  174. };
  175. gsbi@16300000 {
  176. qcom,mode = <GSBI_PROT_I2C_UART>;
  177. status = "ok";
  178. serial@16340000 {
  179. status = "ok";
  180. };
  181. /*
  182. * The i2c device on gsbi4 should not be enabled.
  183. * On ipq806x designs gsbi4 i2c is meant for exclusive
  184. * RPM usage. Turning this on in kernel manifests as
  185. * i2c failure for the RPM.
  186. */
  187. };
  188. gsbi5: gsbi@1a200000 {
  189. qcom,mode = <GSBI_PROT_SPI>;
  190. status = "ok";
  191. spi5: spi@1a280000 {
  192. status = "ok";
  193. pinctrl-0 = <&spi_pins>;
  194. pinctrl-names = "default";
  195. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  196. flash: m25p80@0 {
  197. compatible = "jedec,spi-nor";
  198. #address-cells = <1>;
  199. #size-cells = <1>;
  200. spi-max-frequency = <50000000>;
  201. reg = <0>;
  202. partitions {
  203. compatible = "qcom,smem";
  204. };
  205. };
  206. };
  207. };
  208. gsbi6: gsbi@16500000 {
  209. qcom,mode = <GSBI_PROT_SPI>;
  210. status = "ok";
  211. spi6: spi@16580000 {
  212. status = "ok";
  213. pinctrl-0 = <&spi6_pins>;
  214. pinctrl-names = "default";
  215. cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
  216. spi-nor@0 {
  217. compatible = "jedec,spi-nor";
  218. reg = <0>;
  219. spi-max-frequency = <6000000>;
  220. };
  221. };
  222. };
  223. sata-phy@1b400000 {
  224. status = "ok";
  225. };
  226. sata@29000000 {
  227. ports-implemented = <0x1>;
  228. status = "ok";
  229. };
  230. phy@100f8800 { /* USB3 port 1 HS phy */
  231. status = "ok";
  232. };
  233. phy@100f8830 { /* USB3 port 1 SS phy */
  234. status = "ok";
  235. };
  236. phy@110f8800 { /* USB3 port 0 HS phy */
  237. status = "ok";
  238. };
  239. phy@110f8830 { /* USB3 port 0 SS phy */
  240. status = "ok";
  241. };
  242. usb30@0 {
  243. status = "ok";
  244. pinctrl-0 = <&usb0_pwr_en_pins>;
  245. pinctrl-names = "default";
  246. };
  247. usb30@1 {
  248. status = "ok";
  249. pinctrl-0 = <&usb1_pwr_en_pins>;
  250. pinctrl-names = "default";
  251. };
  252. pcie0: pci@1b500000 {
  253. status = "ok";
  254. };
  255. pcie1: pci@1b700000 {
  256. status = "ok";
  257. force_gen1 = <1>;
  258. };
  259. nand@1ac00000 {
  260. status = "ok";
  261. pinctrl-0 = <&nand_pins>;
  262. pinctrl-names = "default";
  263. cs0 {
  264. reg = <0>;
  265. compatible = "qcom,nandcs";
  266. nand-ecc-strength = <4>;
  267. nand-bus-width = <8>;
  268. nand-ecc-step-size = <512>;
  269. partitions {
  270. compatible = "fixed-partitions";
  271. #address-cells = <1>;
  272. #size-cells = <1>;
  273. qcadata@0 {
  274. label = "qcadata";
  275. reg = <0x0000000 0x0c80000>;
  276. read-only;
  277. };
  278. APPSBL@c80000 {
  279. label = "APPSBL";
  280. reg = <0x0c80000 0x0500000>;
  281. read-only;
  282. };
  283. APPSBLENV@1180000 {
  284. label = "APPSBLENV";
  285. reg = <0x1180000 0x0080000>;
  286. read-only;
  287. };
  288. art: art@1200000 {
  289. label = "art";
  290. reg = <0x1200000 0x0140000>;
  291. read-only;
  292. };
  293. artbak: art@1340000 {
  294. label = "artbak";
  295. reg = <0x1340000 0x0140000>;
  296. read-only;
  297. };
  298. kernel@1480000 {
  299. label = "kernel";
  300. reg = <0x1480000 0x0400000>;
  301. };
  302. ubi@1880000 {
  303. label = "ubi";
  304. reg = <0x1880000 0x1C00000>;
  305. };
  306. netgear@3480000 {
  307. label = "netgear";
  308. reg = <0x3480000 0x4480000>;
  309. read-only;
  310. };
  311. reserve@7900000 {
  312. label = "reserve";
  313. reg = <0x7900000 0x0700000>;
  314. read-only;
  315. };
  316. firmware@1480000 {
  317. label = "firmware";
  318. reg = <0x1480000 0x2000000>;
  319. };
  320. };
  321. };
  322. };
  323. mdio0: mdio {
  324. compatible = "virtual,mdio-gpio";
  325. #address-cells = <1>;
  326. #size-cells = <0>;
  327. gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
  328. pinctrl-0 = <&mdio0_pins>;
  329. pinctrl-names = "default";
  330. phy0: ethernet-phy@0 {
  331. device_type = "ethernet-phy";
  332. reg = <0>;
  333. qca,ar8327-initvals = <
  334. 0x00004 0x7600000 /* PAD0_MODE */
  335. 0x00008 0x1000000 /* PAD5_MODE */
  336. 0x0000c 0x80 /* PAD6_MODE */
  337. 0x000e4 0xaa545 /* MAC_POWER_SEL */
  338. 0x000e0 0xc74164de /* SGMII_CTRL */
  339. 0x0007c 0x4e /* PORT0_STATUS */
  340. 0x00094 0x4e /* PORT6_STATUS */
  341. 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
  342. 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
  343. 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
  344. 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
  345. 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
  346. 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
  347. 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
  348. 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
  349. 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
  350. 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
  351. 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
  352. 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
  353. 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
  354. 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
  355. >;
  356. qca,ar8327-vlans = <
  357. 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
  358. 0x2 0x21 /* VLAN2 Ports 0/5 */
  359. >;
  360. };
  361. phy4: ethernet-phy@4 {
  362. device_type = "ethernet-phy";
  363. reg = <4>;
  364. qca,ar8327-initvals = <
  365. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  366. 0x0000c 0x80 /* PAD6_MODE */
  367. >;
  368. };
  369. };
  370. gmac1: ethernet@37200000 {
  371. status = "ok";
  372. phy-mode = "rgmii";
  373. qcom,id = <1>;
  374. qcom,phy_mdio_addr = <4>;
  375. qcom,poll_required = <0>;
  376. qcom,rgmii_delay = <1>;
  377. qcom,phy_mii_type = <0>;
  378. qcom,emulation = <0>;
  379. qcom,irq = <255>;
  380. mdiobus = <&mdio0>;
  381. pinctrl-0 = <&rgmii2_pins>;
  382. pinctrl-names = "default";
  383. mtd-mac-address = <&art 6>;
  384. fixed-link {
  385. speed = <1000>;
  386. full-duplex;
  387. };
  388. };
  389. gmac2: ethernet@37400000 {
  390. status = "ok";
  391. phy-mode = "sgmii";
  392. qcom,id = <2>;
  393. qcom,phy_mdio_addr = <0>; /* none */
  394. qcom,poll_required = <0>; /* no polling */
  395. qcom,rgmii_delay = <0>;
  396. qcom,phy_mii_type = <1>;
  397. qcom,emulation = <0>;
  398. qcom,irq = <258>;
  399. mdiobus = <&mdio0>;
  400. mtd-mac-address = <&art 0>;
  401. fixed-link {
  402. speed = <1000>;
  403. full-duplex;
  404. };
  405. };
  406. rpm@108000 {
  407. pinctrl-0 = <&i2c4_pins>;
  408. pinctrl-names = "default";
  409. };
  410. };
  411. gpio-keys {
  412. compatible = "gpio-keys";
  413. pinctrl-0 = <&button_pins>;
  414. pinctrl-names = "default";
  415. wifi {
  416. label = "wifi";
  417. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  418. linux,code = <KEY_RFKILL>;
  419. debounce-interval = <60>;
  420. wakeup-source;
  421. };
  422. reset {
  423. label = "reset";
  424. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  425. linux,code = <KEY_RESTART>;
  426. debounce-interval = <60>;
  427. wakeup-source;
  428. };
  429. wps {
  430. label = "wps";
  431. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  432. linux,code = <KEY_WPS_BUTTON>;
  433. debounce-interval = <60>;
  434. wakeup-source;
  435. };
  436. };
  437. gpio-leds {
  438. compatible = "gpio-leds";
  439. pinctrl-0 = <&led_pins>;
  440. pinctrl-names = "default";
  441. power_white: power_white {
  442. label = "r7800:white:power";
  443. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  444. default-state = "keep";
  445. };
  446. power_amber: power_amber {
  447. label = "r7800:amber:power";
  448. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  449. };
  450. wan_white {
  451. label = "r7800:white:wan";
  452. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  453. };
  454. wan_amber {
  455. label = "r7800:amber:wan";
  456. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  457. };
  458. usb1 {
  459. label = "r7800:white:usb1";
  460. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  461. };
  462. usb2 {
  463. label = "r7800:white:usb2";
  464. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  465. };
  466. esata {
  467. label = "r7800:white:esata";
  468. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  469. };
  470. wifi {
  471. label = "r7800:white:wifi";
  472. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  473. };
  474. wps {
  475. label = "r7800:white:wps";
  476. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  477. };
  478. };
  479. };
  480. &adm_dma {
  481. status = "ok";
  482. };