DB-WRT01.dts 1.6 KB

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  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "planex,db-wrt01", "ralink,mt7620a-soc";
  7. model = "Planex DB-WRT01";
  8. aliases {
  9. led-boot = &led_power;
  10. led-failsafe = &led_power;
  11. led-running = &led_power;
  12. led-upgrade = &led_power;
  13. };
  14. leds {
  15. compatible = "gpio-leds";
  16. led_power: power {
  17. label = "db-wrt01:orange:power";
  18. gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  19. };
  20. };
  21. keys {
  22. compatible = "gpio-keys-polled";
  23. poll-interval = <20>;
  24. s1 {
  25. label = "wps";
  26. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  27. linux,code = <KEY_WPS_BUTTON>;
  28. };
  29. };
  30. };
  31. &gpio1 {
  32. status = "okay";
  33. };
  34. &spi0 {
  35. status = "okay";
  36. m25p80@0 {
  37. compatible = "jedec,spi-nor";
  38. reg = <0>;
  39. spi-max-frequency = <10000000>;
  40. partitions {
  41. compatible = "fixed-partitions";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. partition@0 {
  45. label = "u-boot";
  46. reg = <0x0 0x30000>;
  47. read-only;
  48. };
  49. partition@30000 {
  50. label = "u-boot-env";
  51. reg = <0x30000 0x10000>;
  52. read-only;
  53. };
  54. factory: partition@40000 {
  55. label = "factory";
  56. reg = <0x40000 0x10000>;
  57. read-only;
  58. };
  59. partition@50000 {
  60. compatible = "denx,uimage";
  61. label = "firmware";
  62. reg = <0x50000 0x7b0000>;
  63. };
  64. };
  65. };
  66. };
  67. &pinctrl {
  68. state_default: pinctrl0 {
  69. gpio {
  70. ralink,group = "i2c", "spi refclk", "rgmii1";
  71. ralink,function = "gpio";
  72. };
  73. };
  74. };
  75. &ethernet {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&ephy_pins>;
  78. mtd-mac-address = <&factory 0x4>;
  79. mediatek,portmap = "llllw";
  80. };
  81. &gsw {
  82. mediatek,port4 = "ephy";
  83. };
  84. &wmac {
  85. ralink,mtd-eeprom = <&factory 0>;
  86. };