EW1200.dts 2.1 KB

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  1. /dts-v1/;
  2. #include "mt7621.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. compatible = "afoundry,ew1200", "mediatek,mt7621-soc";
  7. model = "EW1200";
  8. aliases {
  9. led-boot = &led_run;
  10. led-failsafe = &led_run;
  11. led-running = &led_run;
  12. led-upgrade = &led_run;
  13. };
  14. memory@0 {
  15. device_type = "memory";
  16. reg = <0x0 0x8000000>;
  17. };
  18. chosen {
  19. bootargs = "console=ttyS0,57600";
  20. };
  21. palmbus: palmbus@1E000000 {
  22. i2c@900 {
  23. status = "okay";
  24. };
  25. };
  26. keys {
  27. compatible = "gpio-keys-polled";
  28. poll-interval = <20>;
  29. reset {
  30. label = "reset";
  31. gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
  32. linux,code = <KEY_RESTART>;
  33. };
  34. };
  35. leds {
  36. compatible = "gpio-leds";
  37. led_run: run {
  38. label = "ew1200:green:run";
  39. gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
  40. };
  41. usb {
  42. label = "ew1200:green:usb";
  43. gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
  44. trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
  45. linux,default-trigger = "usbport";
  46. };
  47. };
  48. };
  49. &sdhci {
  50. status = "okay";
  51. };
  52. &spi0 {
  53. status = "okay";
  54. m25p80@0 {
  55. compatible = "jedec,spi-nor";
  56. reg = <0>;
  57. spi-max-frequency = <10000000>;
  58. m25p,chunked-io = <32>;
  59. partitions {
  60. compatible = "fixed-partitions";
  61. #address-cells = <1>;
  62. #size-cells = <1>;
  63. partition@0 {
  64. label = "u-boot";
  65. reg = <0x0 0x30000>;
  66. read-only;
  67. };
  68. partition@30000 {
  69. label = "u-boot-env";
  70. reg = <0x30000 0x10000>;
  71. read-only;
  72. };
  73. factory: partition@40000 {
  74. label = "factory";
  75. reg = <0x40000 0x10000>;
  76. read-only;
  77. };
  78. partition@50000 {
  79. compatible = "denx,uimage";
  80. label = "firmware";
  81. reg = <0x50000 0xfb0000>;
  82. };
  83. };
  84. };
  85. };
  86. &pcie {
  87. status = "okay";
  88. };
  89. &pcie0 {
  90. mt76@0,0 {
  91. reg = <0x0000 0 0 0 0>;
  92. mediatek,mtd-eeprom = <&factory 0x8000>;
  93. ieee80211-freq-limit = <5000000 6000000>;
  94. };
  95. };
  96. &pcie1 {
  97. mt76@0,0 {
  98. reg = <0x0000 0 0 0 0>;
  99. mediatek,mtd-eeprom = <&factory 0x0000>;
  100. ieee80211-freq-limit = <2400000 2500000>;
  101. };
  102. };
  103. &ethernet {
  104. mtd-mac-address = <&factory 0xe000>;
  105. };
  106. &pinctrl {
  107. state_default: pinctrl0 {
  108. gpio {
  109. ralink,group = "wdt", "rgmii2", "jtag", "mdio";
  110. ralink,function = "gpio";
  111. };
  112. };
  113. };