HC5861.dts 1.8 KB

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  1. /dts-v1/;
  2. #include "HC5X61.dtsi"
  3. / {
  4. compatible = "hiwifi,hc5861", "hiwifi,hc5x61", "ralink,mt7620a-soc";
  5. model = "HiWiFi HC5861";
  6. aliases {
  7. led-boot = &led_system;
  8. led-failsafe = &led_system;
  9. led-running = &led_system;
  10. led-upgrade = &led_system;
  11. };
  12. leds {
  13. compatible = "gpio-leds";
  14. led_system: system {
  15. label = "hc5861:blue:system";
  16. gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  17. };
  18. wlan2g {
  19. label = "hc5861:blue:wlan2g";
  20. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  21. };
  22. internet {
  23. label = "hc5861:blue:internet";
  24. gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  25. };
  26. wlan5g {
  27. label = "hc5861:blue:wlan5g";
  28. gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  29. };
  30. turbo {
  31. label = "hc5861:blue:turbo";
  32. gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  33. };
  34. };
  35. gpio_export {
  36. compatible = "gpio-export";
  37. #size-cells = <0>;
  38. usbpower {
  39. gpio-export,name = "usbpower";
  40. gpio-export,output = <0>;
  41. gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  42. };
  43. sdpower {
  44. gpio-export,name = "sdpower";
  45. gpio-export,output = <0>;
  46. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  47. };
  48. };
  49. };
  50. &ehci {
  51. status = "okay";
  52. };
  53. &ohci {
  54. status = "okay";
  55. };
  56. &ethernet {
  57. status = "okay";
  58. mtd-mac-address = <&factory 0x4>;
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  61. mediatek,portmap = "wllll";
  62. port@4 {
  63. status = "okay";
  64. phy-handle = <&phy4>;
  65. phy-mode = "rgmii";
  66. };
  67. port@5 {
  68. status = "okay";
  69. phy-handle = <&phy5>;
  70. phy-mode = "rgmii";
  71. };
  72. mdio-bus {
  73. status = "okay";
  74. phy4: ethernet-phy@4 {
  75. reg = <4>;
  76. phy-mode = "rgmii";
  77. };
  78. phy5: ethernet-phy@5 {
  79. reg = <5>;
  80. phy-mode = "rgmii";
  81. };
  82. };
  83. };
  84. &gsw {
  85. mediatek,port4 = "gmac";
  86. };
  87. &pcie {
  88. status = "okay";
  89. };
  90. &pcie0 {
  91. mt76@0,0 {
  92. reg = <0x0000 0 0 0 0>;
  93. mediatek,mtd-eeprom = <&factory 0x8000>;
  94. ieee80211-freq-limit = <5000000 6000000>;
  95. };
  96. };