0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch 3.5 KB

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  1. From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
  2. From: Mathias Kresin <[email protected]>
  3. Date: Sun, 7 Jul 2019 21:45:51 +0200
  4. Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
  5. Switch back to the former used names, to make the legacy switch driver
  6. happy.
  7. Signed-off-by: Mathias Kresin <[email protected]>
  8. ---
  9. arch/mips/lantiq/xway/sysctrl.c | 18 +++++++++---------
  10. 1 file changed, 9 insertions(+), 9 deletions(-)
  11. --- a/arch/mips/lantiq/xway/sysctrl.c
  12. +++ b/arch/mips/lantiq/xway/sysctrl.c
  13. @@ -469,9 +469,9 @@ void __init ltq_soc_init(void)
  14. if (of_machine_is_compatible("lantiq,grx390") ||
  15. of_machine_is_compatible("lantiq,ar10")) {
  16. - clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY0);
  17. - clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY1);
  18. - clkdev_add_pmu("1e108000.switch", "gphy2", 0, 0, PMU_GPHY2);
  19. + clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY0);
  20. + clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY1);
  21. + clkdev_add_pmu("1f2030ac.gphy", NULL, 1, 0, PMU_GPHY2);
  22. clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB0_P);
  23. clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB1_P);
  24. /* rc 0 */
  25. @@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
  26. } else if (of_machine_is_compatible("lantiq,grx390")) {
  27. clkdev_add_static(ltq_grx390_cpu_hz(), ltq_grx390_fpi_hz(),
  28. ltq_grx390_fpi_hz(), ltq_grx390_pp32_hz());
  29. - clkdev_add_pmu("1e108000.switch", "gphy3", 0, 0, PMU_GPHY3);
  30. + clkdev_add_pmu("1f203264.gphy", NULL, 1, 0, PMU_GPHY3);
  31. clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
  32. clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
  33. /* rc 2 */
  34. @@ -511,7 +511,7 @@ void __init ltq_soc_init(void)
  35. clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
  36. clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
  37. clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
  38. - clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
  39. + clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
  40. clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  41. clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  42. } else if (of_machine_is_compatible("lantiq,ar10")) {
  43. @@ -519,7 +519,7 @@ void __init ltq_soc_init(void)
  44. ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
  45. clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
  46. clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
  47. - clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
  48. + clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
  49. PMU_PPE_DP | PMU_PPE_TC);
  50. clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  51. clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  52. @@ -540,12 +540,12 @@ void __init ltq_soc_init(void)
  53. clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
  54. clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  55. - clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
  56. + clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
  57. PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
  58. PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
  59. PMU_PPE_QSB | PMU_PPE_TOP);
  60. - clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
  61. - clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
  62. + clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
  63. + clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
  64. clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
  65. clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  66. clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);