rt3352.dtsi 4.1 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3352-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips24KEc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. cpuintc: cpuintc@0 {
  14. #address-cells = <0>;
  15. #interrupt-cells = <1>;
  16. interrupt-controller;
  17. compatible = "mti,cpu-interrupt-controller";
  18. };
  19. palmbus@10000000 {
  20. compatible = "palmbus";
  21. reg = <0x10000000 0x200000>;
  22. ranges = <0x0 0x10000000 0x1FFFFF>;
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. sysc@0 {
  26. compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc";
  27. reg = <0x0 0x100>;
  28. };
  29. timer@100 {
  30. compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
  31. reg = <0x100 0x20>;
  32. interrupt-parent = <&intc>;
  33. interrupts = <1>;
  34. };
  35. watchdog@120 {
  36. compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
  37. reg = <0x120 0x10>;
  38. resets = <&rstctrl 8>;
  39. reset-names = "wdt";
  40. interrupt-parent = <&intc>;
  41. interrupts = <1>;
  42. };
  43. intc: intc@200 {
  44. compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
  45. reg = <0x200 0x100>;
  46. interrupt-controller;
  47. #interrupt-cells = <1>;
  48. interrupt-parent = <&cpuintc>;
  49. interrupts = <2>;
  50. };
  51. memc@300 {
  52. compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
  53. reg = <0x300 0x100>;
  54. resets = <&rstctrl 20>;
  55. reset-names = "mc";
  56. interrupt-parent = <&intc>;
  57. interrupts = <3>;
  58. };
  59. uart@500 {
  60. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  61. reg = <0x500 0x100>;
  62. resets = <&rstctrl 12>;
  63. reset-names = "uart";
  64. interrupt-parent = <&intc>;
  65. interrupts = <5>;
  66. reg-shift = <2>;
  67. status = "disabled";
  68. };
  69. gpio0: gpio@600 {
  70. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  71. reg = <0x600 0x34>;
  72. gpio-controller;
  73. #gpio-cells = <2>;
  74. ralink,gpio-base = <0>;
  75. ralink,num-gpios = <24>;
  76. ralink,register-map = [ 00 04 08 0c
  77. 20 24 28 2c
  78. 30 34 ];
  79. resets = <&rstctrl 13>;
  80. reset-names = "pio";
  81. interrupt-parent = <&intc>;
  82. interrupts = <6>;
  83. status = "disabled";
  84. };
  85. gpio1: gpio@638 {
  86. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  87. reg = <0x638 0x24>;
  88. gpio-controller;
  89. #gpio-cells = <2>;
  90. ralink,gpio-base = <24>;
  91. ralink,num-gpios = <16>;
  92. ralink,register-map = [ 00 04 08 0c
  93. 10 14 18 1c
  94. 20 24 ];
  95. status = "disabled";
  96. };
  97. gpio2: gpio@660 {
  98. compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
  99. reg = <0x660 0x24>;
  100. gpio-controller;
  101. #gpio-cells = <2>;
  102. ralink,gpio-base = <40>;
  103. ralink,num-gpios = <12>;
  104. ralink,register-map = [ 00 04 08 0c
  105. 10 14 18 1c
  106. 20 24 ];
  107. status = "disabled";
  108. };
  109. spi@b00 {
  110. compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
  111. reg = <0xb00 0x100>;
  112. #address-cells = <1>;
  113. #size-cells = <1>;
  114. resets = <&rstctrl 18>;
  115. reset-names = "spi";
  116. status = "disabled";
  117. };
  118. uartlite@c00 {
  119. compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
  120. reg = <0xc00 0x100>;
  121. resets = <&rstctrl 19>;
  122. reset-names = "uartl";
  123. interrupt-parent = <&intc>;
  124. interrupts = <12>;
  125. reg-shift = <2>;
  126. };
  127. };
  128. rstctrl: rstctrl {
  129. compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
  130. #reset-cells = <1>;
  131. };
  132. ethernet@10100000 {
  133. compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
  134. reg = <0x10100000 10000>;
  135. interrupt-parent = <&cpuintc>;
  136. interrupts = <5>;
  137. status = "disabled";
  138. };
  139. esw@10110000 {
  140. compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
  141. reg = <0x10110000 8000>;
  142. interrupt-parent = <&intc>;
  143. interrupts = <17>;
  144. status = "disabled";
  145. };
  146. wmac@10180000 {
  147. compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
  148. reg = <0x10180000 40000>;
  149. interrupt-parent = <&cpuintc>;
  150. interrupts = <6>;
  151. ralink,eeprom = "soc_wmac.eeprom";
  152. status = "disabled";
  153. };
  154. ehci@101c0000 {
  155. compatible = "ralink,rt3352-ehci", "ehci-platform";
  156. reg = <0x101c0000 0x1000>;
  157. interrupt-parent = <&intc>;
  158. interrupts = <18>;
  159. status = "disabled";
  160. };
  161. ohci@101c1000 {
  162. compatible = "ralink,rt3352-ohci", "ohci-platform";
  163. reg = <0x101c1000 0x1000>;
  164. interrupt-parent = <&intc>;
  165. interrupts = <18>;
  166. status = "disabled";
  167. };
  168. };