0005-MIPS-ralink-adds-clkdev-code.patch 2.2 KB

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  1. From b99289db258ee8a84e1bd555b2897476acf390c1 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <[email protected]>
  3. Date: Sun, 20 Jan 2013 22:01:29 +0100
  4. Subject: [PATCH 05/79] MIPS: ralink: adds clkdev code
  5. These SoCs have a limited number of fixed rate clocks. Add support for the
  6. clk and clkdev api.
  7. Signed-off-by: John Crispin <[email protected]>
  8. Signed-off-by: Gabor Juhos <[email protected]>
  9. Patchwork: http://patchwork.linux-mips.org/patch/4894/
  10. ---
  11. arch/mips/ralink/clk.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++
  12. 1 file changed, 72 insertions(+)
  13. create mode 100644 arch/mips/ralink/clk.c
  14. diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
  15. new file mode 100644
  16. index 0000000..8dfa22f
  17. --- /dev/null
  18. +++ b/arch/mips/ralink/clk.c
  19. @@ -0,0 +1,72 @@
  20. +/*
  21. + * This program is free software; you can redistribute it and/or modify it
  22. + * under the terms of the GNU General Public License version 2 as published
  23. + * by the Free Software Foundation.
  24. + *
  25. + * Copyright (C) 2011 Gabor Juhos <[email protected]>
  26. + * Copyright (C) 2013 John Crispin <[email protected]>
  27. + */
  28. +
  29. +#include <linux/kernel.h>
  30. +#include <linux/module.h>
  31. +#include <linux/clkdev.h>
  32. +#include <linux/clk.h>
  33. +
  34. +#include <asm/time.h>
  35. +
  36. +#include "common.h"
  37. +
  38. +struct clk {
  39. + struct clk_lookup cl;
  40. + unsigned long rate;
  41. +};
  42. +
  43. +void ralink_clk_add(const char *dev, unsigned long rate)
  44. +{
  45. + struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
  46. +
  47. + if (!clk)
  48. + panic("failed to add clock\n");
  49. +
  50. + clk->cl.dev_id = dev;
  51. + clk->cl.clk = clk;
  52. +
  53. + clk->rate = rate;
  54. +
  55. + clkdev_add(&clk->cl);
  56. +}
  57. +
  58. +/*
  59. + * Linux clock API
  60. + */
  61. +int clk_enable(struct clk *clk)
  62. +{
  63. + return 0;
  64. +}
  65. +EXPORT_SYMBOL_GPL(clk_enable);
  66. +
  67. +void clk_disable(struct clk *clk)
  68. +{
  69. +}
  70. +EXPORT_SYMBOL_GPL(clk_disable);
  71. +
  72. +unsigned long clk_get_rate(struct clk *clk)
  73. +{
  74. + return clk->rate;
  75. +}
  76. +EXPORT_SYMBOL_GPL(clk_get_rate);
  77. +
  78. +void __init plat_time_init(void)
  79. +{
  80. + struct clk *clk;
  81. +
  82. + ralink_of_remap();
  83. +
  84. + ralink_clk_init();
  85. + clk = clk_get_sys("cpu", NULL);
  86. + if (IS_ERR(clk))
  87. + panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
  88. + pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
  89. + mips_hpt_frequency = clk_get_rate(clk) / 2;
  90. + clk_put(clk);
  91. +}
  92. --
  93. 1.7.10.4