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- From 03035a6566300808c8845799b2f9ceca471aa61a Mon Sep 17 00:00:00 2001
- From: Weijie Gao <[email protected]>
- Date: Fri, 20 May 2022 11:22:41 +0800
- Subject: [PATCH 09/25] reset: mtmips: add reset controller support for
- MediaTek MT7621 SoC
- This patch adds reset controller bits definition header file for MediaTek
- MT7621 SoC
- Signed-off-by: Weijie Gao <[email protected]>
- ---
- include/dt-bindings/reset/mt7621-reset.h | 38 ++++++++++++++++++++++++
- 1 file changed, 38 insertions(+)
- create mode 100644 include/dt-bindings/reset/mt7621-reset.h
- --- /dev/null
- +++ b/include/dt-bindings/reset/mt7621-reset.h
- @@ -0,0 +1,38 @@
- +/* SPDX-License-Identifier: GPL-2.0 */
- +/*
- + * Copyright (C) 2022 MediaTek Inc. All rights reserved.
- + *
- + * Author: Weijie Gao <[email protected]>
- + */
- +
- +#ifndef _DT_BINDINGS_MT7621_RESET_H_
- +#define _DT_BINDINGS_MT7621_RESET_H_
- +
- +#define RST_PPE 31
- +#define RST_SDXC 30
- +#define RST_CRYPTO 29
- +#define RST_AUX_STCK 28
- +#define RST_PCIE2 26
- +#define RST_PCIE1 25
- +#define RST_PCIE0 24
- +#define RST_GMAC 23
- +#define RST_UART3 21
- +#define RST_UART2 20
- +#define RST_UART1 19
- +#define RST_SPI 18
- +#define RST_I2S 17
- +#define RST_I2C 16
- +#define RST_NFI 15
- +#define RST_GDMA 14
- +#define RST_PIO 13
- +#define RST_PCM 11
- +#define RST_MC 10
- +#define RST_INTC 9
- +#define RST_TIMER 8
- +#define RST_SPDIFTX 7
- +#define RST_FE 6
- +#define RST_HSDMA 5
- +#define RST_MCM 2
- +#define RST_SYS 0
- +
- +#endif /* _DT_BINDINGS_MT7621_RESET_H_ */
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