001-mtk-0019-net-mediatek-add-support-for-MediaTek-MT7621-SoC.patch 2.1 KB

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  1. From 7237a6a0c020c05bb819774391154b40b2cfaabd Mon Sep 17 00:00:00 2001
  2. From: Weijie Gao <[email protected]>
  3. Date: Fri, 20 May 2022 11:23:42 +0800
  4. Subject: [PATCH 19/25] net: mediatek: add support for MediaTek MT7621 SoC
  5. This patch adds GMAC support for MediaTek MT7621 SoC.
  6. MT7621 has the same GMAC/Switch configuration as MT7623.
  7. Reviewed-by: Ramon Fried <[email protected]>
  8. Signed-off-by: Weijie Gao <[email protected]>
  9. ---
  10. drivers/net/mtk_eth.c | 21 +++++++++++++++------
  11. 1 file changed, 15 insertions(+), 6 deletions(-)
  12. --- a/drivers/net/mtk_eth.c
  13. +++ b/drivers/net/mtk_eth.c
  14. @@ -145,7 +145,8 @@ enum mtk_switch {
  15. enum mtk_soc {
  16. SOC_MT7623,
  17. SOC_MT7629,
  18. - SOC_MT7622
  19. + SOC_MT7622,
  20. + SOC_MT7621
  21. };
  22. struct mtk_eth_priv {
  23. @@ -675,12 +676,18 @@ static int mt7530_pad_clk_setup(struct m
  24. static int mt7530_setup(struct mtk_eth_priv *priv)
  25. {
  26. u16 phy_addr, phy_val;
  27. - u32 val;
  28. + u32 val, txdrv;
  29. int i;
  30. - /* Select 250MHz clk for RGMII mode */
  31. - mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG,
  32. - ETHSYS_TRGMII_CLK_SEL362_5, 0);
  33. + if (priv->soc != SOC_MT7621) {
  34. + /* Select 250MHz clk for RGMII mode */
  35. + mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG,
  36. + ETHSYS_TRGMII_CLK_SEL362_5, 0);
  37. +
  38. + txdrv = 8;
  39. + } else {
  40. + txdrv = 4;
  41. + }
  42. /* Modify HWTRAP first to allow direct access to internal PHYs */
  43. mt753x_reg_read(priv, HWTRAP_REG, &val);
  44. @@ -738,7 +745,8 @@ static int mt7530_setup(struct mtk_eth_p
  45. /* Lower Tx Driving for TRGMII path */
  46. for (i = 0 ; i < NUM_TRGMII_CTRL ; i++)
  47. mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i),
  48. - (8 << TD_DM_DRVP_S) | (8 << TD_DM_DRVN_S));
  49. + (txdrv << TD_DM_DRVP_S) |
  50. + (txdrv << TD_DM_DRVN_S));
  51. for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
  52. mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16);
  53. @@ -1540,6 +1548,7 @@ static const struct udevice_id mtk_eth_i
  54. { .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 },
  55. { .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 },
  56. { .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 },
  57. + { .compatible = "mediatek,mt7621-eth", .data = SOC_MT7621 },
  58. {}
  59. };