0501-crypto-add-eip97-inside-secure-support.patch 1.0 KB

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  1. --- a/drivers/crypto/inside-secure/safexcel.c
  2. +++ b/drivers/crypto/inside-secure/safexcel.c
  3. @@ -595,6 +595,14 @@ static int safexcel_hw_init(struct safex
  4. val |= EIP197_MST_CTRL_TX_MAX_CMD(5);
  5. writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
  6. }
  7. + /*
  8. + * Set maximum number of TX commands to 2^5 = 32 for EIP97 HW2.1
  9. + */
  10. + else {
  11. + val = 0;
  12. + val |= EIP97_MST_CTRL_TX_MAX_CMD(5);
  13. + writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
  14. + }
  15. /* Configure wr/rd cache values */
  16. writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) |
  17. --- a/drivers/crypto/inside-secure/safexcel.h
  18. +++ b/drivers/crypto/inside-secure/safexcel.h
  19. @@ -306,6 +306,7 @@
  20. #define EIP197_MST_CTRL_RD_CACHE(n) (((n) & 0xf) << 0)
  21. #define EIP197_MST_CTRL_WD_CACHE(n) (((n) & 0xf) << 4)
  22. #define EIP197_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 20)
  23. +#define EIP97_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 4)
  24. #define EIP197_MST_CTRL_BYTE_SWAP BIT(24)
  25. #define EIP197_MST_CTRL_NO_BYTE_SWAP BIT(25)
  26. #define EIP197_MST_CTRL_BYTE_SWAP_BITS GENMASK(25, 24)