0600-2-6-net-dsa-mt7530-Extend-device-data-ready-for-adding-a-new-hardware.patch 15 KB

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  1. From patchwork Tue Dec 10 08:14:38 2019
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  5. X-Patchwork-Submitter: Landen Chao <[email protected]>
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  50. From: Landen Chao <[email protected]>
  51. To: <[email protected]>, <[email protected]>,
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  55. <[email protected]>,
  56. <[email protected]>, <[email protected]>,
  57. <[email protected]>, <[email protected]>,
  58. <[email protected]>, Landen Chao <[email protected]>
  59. Subject: [PATCH net-next 2/6] net: dsa: mt7530: Extend device data ready for
  60. adding a new hardware
  61. Date: Tue, 10 Dec 2019 16:14:38 +0800
  62. Message-ID: <2d546d6bb15ff8b4b75af2220e20db4e634f4145.1575914275.git.landen.chao@mediatek.com>
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  72. Add a structure holding required operations for each device such as device
  73. initialization, PHY port read or write, a checker whether PHY interface is
  74. supported on a certain port, MAC port setup for either bus pad or a
  75. specific PHY interface.
  76. The patch is done for ready adding a new hardware MT7531.
  77. Signed-off-by: Landen Chao <[email protected]>
  78. Signed-off-by: Sean Wang <[email protected]>
  79. ---
  80. drivers/net/dsa/mt7530.c | 231 +++++++++++++++++++++++++++++----------
  81. drivers/net/dsa/mt7530.h | 29 ++++-
  82. 2 files changed, 203 insertions(+), 57 deletions(-)
  83. --- a/drivers/net/dsa/mt7530.c
  84. +++ b/drivers/net/dsa/mt7530.c
  85. @@ -373,7 +373,7 @@ mt7530_fdb_write(struct mt7530_priv *pri
  86. }
  87. static int
  88. -mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
  89. +mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t mode)
  90. {
  91. struct mt7530_priv *priv = ds->priv;
  92. u32 ncpo1, ssc_delta, trgint, i, xtal;
  93. @@ -1355,13 +1355,111 @@ mt7530_setup(struct dsa_switch *ds)
  94. return 0;
  95. }
  96. -static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
  97. +static bool mt7530_phy_supported(struct dsa_switch *ds, int port,
  98. + const struct phylink_link_state *state)
  99. +{
  100. + struct mt7530_priv *priv = ds->priv;
  101. +
  102. + switch (port) {
  103. + case 0: /* Internal phy */
  104. + case 1:
  105. + case 2:
  106. + case 3:
  107. + case 4:
  108. + if (state->interface != PHY_INTERFACE_MODE_GMII)
  109. + goto unsupported;
  110. + break;
  111. + case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
  112. + if (!phy_interface_mode_is_rgmii(state->interface) &&
  113. + state->interface != PHY_INTERFACE_MODE_MII &&
  114. + state->interface != PHY_INTERFACE_MODE_GMII)
  115. + goto unsupported;
  116. + break;
  117. + case 6: /* 1st cpu port */
  118. + if (state->interface != PHY_INTERFACE_MODE_RGMII &&
  119. + state->interface != PHY_INTERFACE_MODE_TRGMII)
  120. + goto unsupported;
  121. + break;
  122. + default:
  123. + dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
  124. + port);
  125. + goto unsupported;
  126. + }
  127. +
  128. + return true;
  129. +
  130. +unsupported:
  131. + return false;
  132. +}
  133. +
  134. +static bool mt753x_phy_supported(struct dsa_switch *ds, int port,
  135. + const struct phylink_link_state *state)
  136. +{
  137. + struct mt7530_priv *priv = ds->priv;
  138. +
  139. + return priv->info->phy_supported(ds, port, state);
  140. +}
  141. +
  142. +static int
  143. +mt7530_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
  144. +{
  145. + struct mt7530_priv *priv = ds->priv;
  146. +
  147. + /* Setup TX circuit incluing relevant PAD and driving */
  148. + mt7530_pad_clk_setup(ds, state->interface);
  149. +
  150. + if (priv->id == ID_MT7530) {
  151. + /* Setup RX circuit, relevant PAD and driving on the
  152. + * host which must be placed after the setup on the
  153. + * device side is all finished.
  154. + */
  155. + mt7623_pad_clk_setup(ds);
  156. + }
  157. +
  158. + return 0;
  159. +}
  160. +
  161. +static int
  162. +mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
  163. +{
  164. + struct mt7530_priv *priv = ds->priv;
  165. +
  166. + return priv->info->pad_setup(ds, state);
  167. +}
  168. +
  169. +static int
  170. +mt7530_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
  171. + const struct phylink_link_state *state)
  172. +{
  173. + struct mt7530_priv *priv = ds->priv;
  174. +
  175. + /* Only need to setup port5. */
  176. + if (port != 5)
  177. + return 0;
  178. +
  179. + mt7530_setup_port5(priv->ds, state->interface);
  180. +
  181. + return 0;
  182. +}
  183. +
  184. +static int mt753x_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
  185. + const struct phylink_link_state *state)
  186. +{
  187. + struct mt7530_priv *priv = ds->priv;
  188. +
  189. + return priv->info->mac_setup(ds, port, mode, state);
  190. +}
  191. +
  192. +static void mt753x_phylink_mac_config(struct dsa_switch *ds, int port,
  193. unsigned int mode,
  194. const struct phylink_link_state *state)
  195. {
  196. struct mt7530_priv *priv = ds->priv;
  197. u32 mcr_cur, mcr_new;
  198. + if (!mt753x_phy_supported(ds, port, state))
  199. + return;
  200. +
  201. switch (port) {
  202. case 0: /* Internal phy */
  203. case 1:
  204. @@ -1374,24 +1472,15 @@ static void mt7530_phylink_mac_config(st
  205. case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
  206. if (priv->p5_interface == state->interface)
  207. break;
  208. - if (!phy_interface_mode_is_rgmii(state->interface) &&
  209. - state->interface != PHY_INTERFACE_MODE_MII &&
  210. - state->interface != PHY_INTERFACE_MODE_GMII)
  211. - return;
  212. -
  213. - mt7530_setup_port5(ds, state->interface);
  214. + if (mt753x_mac_setup(ds, port, mode, state) < 0)
  215. + goto unsupported;
  216. break;
  217. case 6: /* 1st cpu port */
  218. if (priv->p6_interface == state->interface)
  219. break;
  220. -
  221. - if (state->interface != PHY_INTERFACE_MODE_RGMII &&
  222. - state->interface != PHY_INTERFACE_MODE_TRGMII)
  223. - return;
  224. -
  225. - /* Setup TX circuit incluing relevant PAD and driving */
  226. - mt7530_pad_clk_setup(ds, state->interface);
  227. -
  228. + mt753x_pad_setup(ds, state);
  229. + if (mt753x_mac_setup(ds, port, mode, state) < 0)
  230. + goto unsupported;
  231. priv->p6_interface = state->interface;
  232. break;
  233. default:
  234. @@ -1459,38 +1548,14 @@ static void mt7530_phylink_mac_link_up(s
  235. mt7530_port_set_status(priv, port, 1);
  236. }
  237. -static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
  238. +static void mt753x_phylink_validate(struct dsa_switch *ds, int port,
  239. unsigned long *supported,
  240. struct phylink_link_state *state)
  241. {
  242. __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
  243. - switch (port) {
  244. - case 0: /* Internal phy */
  245. - case 1:
  246. - case 2:
  247. - case 3:
  248. - case 4:
  249. - if (state->interface != PHY_INTERFACE_MODE_NA &&
  250. - state->interface != PHY_INTERFACE_MODE_GMII)
  251. - goto unsupported;
  252. - break;
  253. - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
  254. - if (state->interface != PHY_INTERFACE_MODE_NA &&
  255. - !phy_interface_mode_is_rgmii(state->interface) &&
  256. - state->interface != PHY_INTERFACE_MODE_MII &&
  257. - state->interface != PHY_INTERFACE_MODE_GMII)
  258. - goto unsupported;
  259. - break;
  260. - case 6: /* 1st cpu port */
  261. - if (state->interface != PHY_INTERFACE_MODE_NA &&
  262. - state->interface != PHY_INTERFACE_MODE_RGMII &&
  263. - state->interface != PHY_INTERFACE_MODE_TRGMII)
  264. - goto unsupported;
  265. - break;
  266. - default:
  267. - dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
  268. -unsupported:
  269. + if (state->interface != PHY_INTERFACE_MODE_NA &&
  270. + !mt753x_phy_supported(ds, port, state)) {
  271. linkmode_zero(supported);
  272. return;
  273. }
  274. @@ -1609,12 +1674,36 @@ static int mt7530_set_mac_eee(struct dsa
  275. return 0;
  276. }
  277. +static int
  278. +mt753x_setup(struct dsa_switch *ds)
  279. +{
  280. + struct mt7530_priv *priv = ds->priv;
  281. +
  282. + return priv->info->setup(ds);
  283. +}
  284. +
  285. +static int
  286. +mt753x_phy_read(struct dsa_switch *ds, int port, int regnum)
  287. +{
  288. + struct mt7530_priv *priv = ds->priv;
  289. +
  290. + return priv->info->phy_read(ds, port, regnum);
  291. +}
  292. +
  293. +static int
  294. +mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
  295. +{
  296. + struct mt7530_priv *priv = ds->priv;
  297. +
  298. + return priv->info->phy_write(ds, port, regnum, val);
  299. +}
  300. +
  301. static const struct dsa_switch_ops mt7530_switch_ops = {
  302. .get_tag_protocol = mtk_get_tag_protocol,
  303. - .setup = mt7530_setup,
  304. + .setup = mt753x_setup,
  305. .get_strings = mt7530_get_strings,
  306. - .phy_read = mt7530_phy_read,
  307. - .phy_write = mt7530_phy_write,
  308. + .phy_read = mt753x_phy_read,
  309. + .phy_write = mt753x_phy_write,
  310. .get_ethtool_stats = mt7530_get_ethtool_stats,
  311. .get_sset_count = mt7530_get_sset_count,
  312. .port_enable = mt7530_port_enable,
  313. @@ -1631,18 +1720,39 @@ static const struct dsa_switch_ops mt753
  314. .port_vlan_del = mt7530_port_vlan_del,
  315. .port_mirror_add = mt7530_port_mirror_add,
  316. .port_mirror_del = mt7530_port_mirror_del,
  317. - .phylink_validate = mt7530_phylink_validate,
  318. + .phylink_validate = mt753x_phylink_validate,
  319. .phylink_mac_link_state = mt7530_phylink_mac_link_state,
  320. - .phylink_mac_config = mt7530_phylink_mac_config,
  321. + .phylink_mac_config = mt753x_phylink_mac_config,
  322. .phylink_mac_link_down = mt7530_phylink_mac_link_down,
  323. .phylink_mac_link_up = mt7530_phylink_mac_link_up,
  324. .get_mac_eee = mt7530_get_mac_eee,
  325. .set_mac_eee = mt7530_set_mac_eee,
  326. };
  327. -static const struct of_device_id mt7530_of_match[] = {
  328. - { .compatible = "mediatek,mt7621", .data = (void *)ID_MT7621, },
  329. - { .compatible = "mediatek,mt7530", .data = (void *)ID_MT7530, },
  330. +static const struct mt753x_info mt753x_table[] = {
  331. + [ID_MT7621] = {
  332. + .id = ID_MT7621,
  333. + .setup = mt7530_setup,
  334. + .phy_read = mt7530_phy_read,
  335. + .phy_write = mt7530_phy_write,
  336. + .phy_supported = mt7530_phy_supported,
  337. + .pad_setup = mt7530_pad_setup,
  338. + .mac_setup = mt7530_mac_setup,
  339. + },
  340. + [ID_MT7530] = {
  341. + .id = ID_MT7530,
  342. + .setup = mt7530_setup,
  343. + .phy_read = mt7530_phy_read,
  344. + .phy_write = mt7530_phy_write,
  345. + .phy_supported = mt7530_phy_supported,
  346. + .pad_setup = mt7530_pad_setup,
  347. + .mac_setup = mt7530_mac_setup,
  348. + },
  349. +};
  350. +
  351. + static const struct of_device_id mt7530_of_match[] = {
  352. + { .compatible = "mediatek,mt7621", .data = &mt753x_table[ID_MT7621], },
  353. + { .compatible = "mediatek,mt7530", .data = &mt753x_table[ID_MT7530], },
  354. { /* sentinel */ },
  355. };
  356. MODULE_DEVICE_TABLE(of, mt7530_of_match);
  357. @@ -1680,8 +1790,19 @@ mt7530_probe(struct mdio_device *mdiodev
  358. /* Get the hardware identifier from the devicetree node.
  359. * We will need it for some of the clock and regulator setup.
  360. */
  361. - priv->id = (unsigned int)(unsigned long)
  362. - of_device_get_match_data(&mdiodev->dev);
  363. + priv->info = of_device_get_match_data(&mdiodev->dev);
  364. + if (!priv->info)
  365. + return -EINVAL;
  366. +
  367. + /* Sanity check if these required device operstaions are filled
  368. + * properly.
  369. + */
  370. + if (!priv->info->setup || !priv->info->phy_read ||
  371. + !priv->info->phy_write || !priv->info->phy_supported ||
  372. + !priv->info->pad_setup || !priv->info->mac_setup)
  373. + return -EINVAL;
  374. +
  375. + priv->id = priv->info->id;
  376. if (priv->id == ID_MT7530) {
  377. priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core");
  378. --- a/drivers/net/dsa/mt7530.h
  379. +++ b/drivers/net/dsa/mt7530.h
  380. @@ -11,7 +11,7 @@
  381. #define MT7530_NUM_FDB_RECORDS 2048
  382. #define MT7530_ALL_MEMBERS 0xff
  383. -enum {
  384. +enum mt753x_id {
  385. ID_MT7530 = 0,
  386. ID_MT7621 = 1,
  387. };
  388. @@ -447,6 +447,32 @@ static const char *p5_intf_modes(unsigne
  389. }
  390. }
  391. +/* struct mt753x_info - This is the main data structure for holding the specific
  392. + * part for each supported device
  393. + * @setup: Holding the handler to a device initialization
  394. + * @phy_read: Holding the way reading PHY port
  395. + * @phy_write: Holding the way writing PHY port
  396. + * @phy_supported: Check if the PHY type is being supported on a certain
  397. + * port
  398. + * @pad_setup: Holding the way setting up the bus pad for a certain MAC
  399. + * port
  400. + * @mac_setup: Holding the way setting up the PHY attribute for a
  401. + * certain MAC port
  402. + */
  403. +struct mt753x_info {
  404. + enum mt753x_id id;
  405. +
  406. + int (*setup)(struct dsa_switch *ds);
  407. + int (*phy_read)(struct dsa_switch *ds, int port, int regnum);
  408. + int (*phy_write)(struct dsa_switch *ds, int port, int regnum, u16 val);
  409. + bool (*phy_supported)(struct dsa_switch *ds, int port,
  410. + const struct phylink_link_state *state);
  411. + int (*pad_setup)(struct dsa_switch *ds,
  412. + const struct phylink_link_state *state);
  413. + int (*mac_setup)(struct dsa_switch *ds, int port, unsigned int mode,
  414. + const struct phylink_link_state *state);
  415. +};
  416. +
  417. /* struct mt7530_priv - This is the main data structure for holding the state
  418. * of the driver
  419. * @dev: The device pointer
  420. @@ -472,6 +498,7 @@ struct mt7530_priv {
  421. struct regulator *core_pwr;
  422. struct regulator *io_pwr;
  423. struct gpio_desc *reset;
  424. + const struct mt753x_info *info;
  425. unsigned int id;
  426. bool mcm;
  427. phy_interface_t p6_interface;