bcm6348.dtsi 2.9 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "brcm,bcm6348";
  5. aliases {
  6. pflash = &pflash;
  7. pinctrl = &pinctrl;
  8. serial0 = &uart0;
  9. spi0 = &lsspi;
  10. };
  11. cpus {
  12. #address-cells = <1>;
  13. #size-cells = <0>;
  14. cpu@0 {
  15. compatible = "brcm,bmips3300", "mips,mips4Kc";
  16. device_type = "cpu";
  17. reg = <0>;
  18. };
  19. };
  20. cpu_intc: interrupt-controller {
  21. #address-cells = <0>;
  22. compatible = "mti,cpu-interrupt-controller";
  23. interrupt-controller;
  24. #interrupt-cells = <1>;
  25. };
  26. memory { device_type = "memory"; reg = <0 0>; };
  27. pflash: nor@1fc00000 {
  28. compatible = "cfi-flash";
  29. reg = <0x1fc00000 0x400000>;
  30. bank-width = <2>;
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. status = "disabled";
  34. };
  35. ubus@fff00000 {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. ranges;
  39. compatible = "simple-bus";
  40. interrupt-parent = <&periph_intc>;
  41. periph_intc: interrupt-controller@fffe000c {
  42. compatible = "brcm,bcm6345-l1-intc";
  43. reg = <0xfffe000c 0x8>;
  44. interrupt-controller;
  45. #interrupt-cells = <1>;
  46. interrupt-parent = <&cpu_intc>;
  47. interrupts = <2>;
  48. };
  49. ext_intc: interrupt-controller@fffe0014 {
  50. compatible = "brcm,bcm6345-ext-intc";
  51. reg = <0xfffe0014 0x4>;
  52. interrupt-controller;
  53. #interrupt-cells = <2>;
  54. interrupt-parent = <&cpu_intc>;
  55. interrupts = <3>, <4>, <5>, <6>;
  56. brcm,field-width = <5>;
  57. };
  58. pinctrl: pin-controller@fffe0400 {
  59. compatible = "brcm,bcm6348-pinctrl";
  60. reg = <0xfffe0400 0x8>,
  61. <0xfffe0408 0x8>,
  62. <0xfffe0418 0x4>;
  63. reg-names = "dirout", "dat", "mode";
  64. gpio-controller;
  65. #gpio-cells = <2>;
  66. interrupt-parent = <&ext_intc>;
  67. interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
  68. interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
  69. pinctrl_ext_ephy: ext_ephy {
  70. function = "ext_ephy";
  71. groups = "group1", "group4";
  72. };
  73. pinctrl_mii_snoop: mii_snoop {
  74. function = "ext_ephy";
  75. groups = "group1", "group4";
  76. };
  77. pinctrl_legacy_led: legacy_led {
  78. function = "legacy_led";
  79. groups = "group4";
  80. };
  81. pinctrl_mii_pccard: mii_pccard {
  82. function = "mii_pccard";
  83. groups = "group1";
  84. };
  85. pinctrl_pci: pci {
  86. function = "pci";
  87. groups = "group2";
  88. };
  89. pinctrl_spi_master_uart: spi_master_uart {
  90. function = "spi_master_uart";
  91. groups = "group1";
  92. };
  93. pinctrl_ext_mii: ext_mii {
  94. function = "ext_mii";
  95. groups = "group0", "group3";
  96. };
  97. pinctrl_utopia: utopia {
  98. function = "utopia";
  99. groups = "group0", "group1", "group3";
  100. };
  101. };
  102. uart0: serial@fffe0300 {
  103. compatible = "brcm,bcm6345-uart";
  104. reg = <0xfffe0300 0x18>;
  105. interrupt-parent = <&periph_intc>;
  106. interrupts = <2>;
  107. /* clocks = <&periph_clk>; */
  108. /* clock-names = "refclk"; */
  109. status = "disabled";
  110. };
  111. lsspi: spi@fffe0c00 {
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. compatible = "brcm,bcm6348-spi";
  115. reg = <0xfffe0c00 0x40>;
  116. interrupts = <1>;
  117. /* clocks = <&clkctl 9>; */
  118. };
  119. };
  120. };