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- From 83afcf14edb9217e58837eb119da96d734a4b3b1 Mon Sep 17 00:00:00 2001
- From: Robert Marko <[email protected]>
- Date: Sat, 21 Oct 2023 14:00:07 +0200
- Subject: [PATCH] arm64: dts: qcom: ipq6018: use CPUFreq NVMEM
- IPQ6018 comes in multiple SKU-s and some of them dont support all of the
- OPP-s that are current set, so lets utilize CPUFreq NVMEM to allow only
- supported OPP-s based on the SoC dynamically.
- As an example, IPQ6018 is generaly rated at 1.8GHz but some silicon only
- goes up to 1.5GHz and is marked as such via an eFuse.
- Signed-off-by: Robert Marko <[email protected]>
- Reviewed-by: Konrad Dybcio <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- Signed-off-by: Bjorn Andersson <[email protected]>
- ---
- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
- --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
- +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
- @@ -95,42 +95,49 @@
- };
-
- cpu_opp_table: opp-table-cpu {
- - compatible = "operating-points-v2";
- + compatible = "operating-points-v2-kryo-cpu";
- + nvmem-cells = <&cpu_speed_bin>;
- opp-shared;
-
- opp-864000000 {
- opp-hz = /bits/ 64 <864000000>;
- opp-microvolt = <725000>;
- + opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- };
-
- opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-microvolt = <787500>;
- + opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- };
-
- opp-1320000000 {
- opp-hz = /bits/ 64 <1320000000>;
- opp-microvolt = <862500>;
- + opp-supported-hw = <0x3>;
- clock-latency-ns = <200000>;
- };
-
- opp-1440000000 {
- opp-hz = /bits/ 64 <1440000000>;
- opp-microvolt = <925000>;
- + opp-supported-hw = <0x3>;
- clock-latency-ns = <200000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <987500>;
- + opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1062500>;
- + opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- };
- };
- @@ -321,6 +328,11 @@
- reg = <0x0 0x000a4000 0x0 0x2000>;
- #address-cells = <1>;
- #size-cells = <1>;
- +
- + cpu_speed_bin: cpu-speed-bin@135 {
- + reg = <0x135 0x1>;
- + bits = <7 1>;
- + };
- };
-
- prng: qrng@e3000 {
|
