0062-v6.8-arm64-dts-qcom-ipq8074-Add-QUP4-SPI-node.patch 1.2 KB

1234567891011121314151617181920212223242526272829303132333435363738
  1. From 6a25e70214fde6dcf900271c819c8d7fe7b9a4b0 Mon Sep 17 00:00:00 2001
  2. From: Robert Marko <[email protected]>
  3. Date: Thu, 23 Nov 2023 13:12:54 +0100
  4. Subject: [PATCH] arm64: dts: qcom: ipq8074: Add QUP4 SPI node
  5. Add node to support the QUP4 SPI controller inside of IPQ8074.
  6. Some devices use this bus to communicate to a Bluetooth controller.
  7. Signed-off-by: Robert Marko <[email protected]>
  8. Link: https://lore.kernel.org/r/[email protected]
  9. Signed-off-by: Bjorn Andersson <[email protected]>
  10. ---
  11. arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++++
  12. 1 file changed, 14 insertions(+)
  13. --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  14. +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
  15. @@ -529,6 +529,20 @@
  16. status = "disabled";
  17. };
  18. + blsp1_spi4: spi@78b8000 {
  19. + compatible = "qcom,spi-qup-v2.2.1";
  20. + #address-cells = <1>;
  21. + #size-cells = <0>;
  22. + reg = <0x78b8000 0x600>;
  23. + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
  24. + clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
  25. + <&gcc GCC_BLSP1_AHB_CLK>;
  26. + clock-names = "core", "iface";
  27. + dmas = <&blsp_dma 18>, <&blsp_dma 19>;
  28. + dma-names = "tx", "rx";
  29. + status = "disabled";
  30. + };
  31. +
  32. blsp1_i2c5: i2c@78b9000 {
  33. compatible = "qcom,i2c-qup-v2.2.1";
  34. #address-cells = <1>;