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0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch 2.1 KB

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  1. From da76cb63d04dc22ed32123b8c1d084c006d67bfb Mon Sep 17 00:00:00 2001
  2. From: Robert Marko <[email protected]>
  3. Date: Mon, 7 Nov 2022 14:29:01 +0100
  4. Subject: [PATCH] clk: qcom: ipq8074: add missing networking resets
  5. Downstream QCA 5.4 kernel defines networking resets which are not present
  6. in the mainline kernel but are required for the networking drivers.
  7. So, port the downstream resets and avoid using magic values for mask,
  8. construct mask for resets which require multiple bits to be set/cleared.
  9. Signed-off-by: Robert Marko <[email protected]>
  10. Signed-off-by: Bjorn Andersson <[email protected]>
  11. Link: https://lore.kernel.org/r/[email protected]
  12. ---
  13. drivers/clk/qcom/gcc-ipq8074.c | 14 ++++++++++++++
  14. 1 file changed, 14 insertions(+)
  15. --- a/drivers/clk/qcom/gcc-ipq8074.c
  16. +++ b/drivers/clk/qcom/gcc-ipq8074.c
  17. @@ -4665,6 +4665,20 @@ static const struct qcom_reset_map gcc_i
  18. [GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 },
  19. [GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
  20. [GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
  21. + [GCC_PPE_FULL_RESET] = { .reg = 0x68014, .bitmask = GENMASK(19, 16) },
  22. + [GCC_UNIPHY0_SOFT_RESET] = { .reg = 0x56004, .bitmask = GENMASK(13, 4) | BIT(1) },
  23. + [GCC_UNIPHY0_XPCS_RESET] = { 0x56004, 2 },
  24. + [GCC_UNIPHY1_SOFT_RESET] = { .reg = 0x56104, .bitmask = GENMASK(5, 4) | BIT(1) },
  25. + [GCC_UNIPHY1_XPCS_RESET] = { 0x56104, 2 },
  26. + [GCC_UNIPHY2_SOFT_RESET] = { .reg = 0x56204, .bitmask = GENMASK(5, 4) | BIT(1) },
  27. + [GCC_UNIPHY2_XPCS_RESET] = { 0x56204, 2 },
  28. + [GCC_EDMA_HW_RESET] = { .reg = 0x68014, .bitmask = GENMASK(21, 20) },
  29. + [GCC_NSSPORT1_RESET] = { .reg = 0x68014, .bitmask = BIT(24) | GENMASK(1, 0) },
  30. + [GCC_NSSPORT2_RESET] = { .reg = 0x68014, .bitmask = BIT(25) | GENMASK(3, 2) },
  31. + [GCC_NSSPORT3_RESET] = { .reg = 0x68014, .bitmask = BIT(26) | GENMASK(5, 4) },
  32. + [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) },
  33. + [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) },
  34. + [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) },
  35. };
  36. static struct gdsc *gcc_ipq8074_gdscs[] = {