| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960 |
- From 5f20690f77878b1ba24ec88df01b92d5131a6780 Mon Sep 17 00:00:00 2001
- From: Krzysztof Kozlowski <[email protected]>
- Date: Tue, 8 Nov 2022 15:23:57 +0100
- Subject: [PATCH] arm64: dts: qcom: ipq8074: align TLMM pin configuration with
- DT schema
- DT schema expects TLMM pin configuration nodes to be named with
- '-state' suffix and their optional children with '-pins' suffix.
- Signed-off-by: Krzysztof Kozlowski <[email protected]>
- Reviewed-by: Konrad Dybcio <[email protected]>
- Signed-off-by: Bjorn Andersson <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- ---
- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
- --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
- @@ -320,35 +320,35 @@
- interrupt-controller;
- #interrupt-cells = <0x2>;
-
- - serial_4_pins: serial4-pinmux {
- + serial_4_pins: serial4-state {
- pins = "gpio23", "gpio24";
- function = "blsp4_uart1";
- drive-strength = <8>;
- bias-disable;
- };
-
- - i2c_0_pins: i2c-0-pinmux {
- + i2c_0_pins: i2c-0-state {
- pins = "gpio42", "gpio43";
- function = "blsp1_i2c";
- drive-strength = <8>;
- bias-disable;
- };
-
- - spi_0_pins: spi-0-pins {
- + spi_0_pins: spi-0-state {
- pins = "gpio38", "gpio39", "gpio40", "gpio41";
- function = "blsp0_spi";
- drive-strength = <8>;
- bias-disable;
- };
-
- - hsuart_pins: hsuart-pins {
- + hsuart_pins: hsuart-state {
- pins = "gpio46", "gpio47", "gpio48", "gpio49";
- function = "blsp2_uart";
- drive-strength = <8>;
- bias-disable;
- };
-
- - qpic_pins: qpic-pins {
- + qpic_pins: qpic-state {
- pins = "gpio1", "gpio3", "gpio4",
- "gpio5", "gpio6", "gpio7",
- "gpio8", "gpio10", "gpio11",
|
