0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch 2.0 KB

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  1. From feeef118fda562cf9081edef8ad464d89db070f4 Mon Sep 17 00:00:00 2001
  2. From: Robert Marko <[email protected]>
  3. Date: Tue, 27 Sep 2022 22:12:18 +0200
  4. Subject: [PATCH] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node
  5. The ARM timer is usually considered not part of SoC node, just like
  6. other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
  7. arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
  8. From schema: dtschema/schemas/simple-bus.yaml
  9. Signed-off-by: Robert Marko <[email protected]>
  10. Reviewed-by: Krzysztof Kozlowski <[email protected]>
  11. Reviewed-by: Neil Armstrong <[email protected]>
  12. Signed-off-by: Bjorn Andersson <[email protected]>
  13. Link: https://lore.kernel.org/r/[email protected]
  14. ---
  15. arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++--------
  16. 1 file changed, 8 insertions(+), 8 deletions(-)
  17. --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  18. +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
  19. @@ -510,14 +510,6 @@
  20. clock-names = "xo";
  21. };
  22. - timer {
  23. - compatible = "arm,armv8-timer";
  24. - interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  25. - <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  26. - <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  27. - <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  28. - };
  29. -
  30. timer@b120000 {
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. @@ -769,6 +761,14 @@
  34. };
  35. };
  36. + timer {
  37. + compatible = "arm,armv8-timer";
  38. + interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  39. + <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  40. + <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  41. + <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  42. + };
  43. +
  44. wcss: wcss-smp2p {
  45. compatible = "qcom,smp2p";
  46. qcom,smem = <435>, <428>;