800-Revert-spi-bcm-qspi-Fix-bcm_qspi_bspi_read-performan.patch 4.4 KB

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  1. From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
  2. Subject: [PATCH] Revert "spi: bcm-qspi: Fix bcm_qspi_bspi_read() performance"
  3. MIME-Version: 1.0
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  6. This reverts commit 345309fa7c0c9206a5344d379b174499952d79d9.
  7. BSPI reads became unstable starting with above commit. There are BSPI
  8. timeouts like this:
  9. [ 15.637809] bcm_iproc 18029200.spi: timeout waiting for BSPI
  10. (...)
  11. [ 15.997809] bcm_iproc 18029200.spi: timeout waiting for BSPI
  12. which cause filesystem stability problems.
  13. Before above commit every time that bcm_qspi_bspi_lr_l2_isr() called
  14. bcm_qspi_bspi_lr_l2_isr() it was resulting in bspi_rf_msg_len becoming
  15. 0.
  16. With that change it's not the case anymore which suggests there may be
  17. some bug around that code.
  18. It has changed and the new behavior seems to be causing problems.
  19. Signed-off-by: Rafał Miłecki <[email protected]>
  20. ---
  21. --- a/drivers/spi/spi-bcm-qspi.c
  22. +++ b/drivers/spi/spi-bcm-qspi.c
  23. @@ -88,7 +88,7 @@
  24. #define BSPI_BPP_MODE_SELECT_MASK BIT(8)
  25. #define BSPI_BPP_ADDR_SELECT_MASK BIT(16)
  26. -#define BSPI_READ_LENGTH 512
  27. +#define BSPI_READ_LENGTH 256
  28. /* MSPI register offsets */
  29. #define MSPI_SPCR0_LSB 0x000
  30. @@ -806,7 +806,7 @@ static int bcm_qspi_bspi_flash_read(stru
  31. struct spi_flash_read_message *msg)
  32. {
  33. struct bcm_qspi *qspi = spi_master_get_devdata(spi->master);
  34. - u32 addr = 0, len, rdlen, len_words;
  35. + u32 addr = 0, len, len_words;
  36. int ret = 0;
  37. unsigned long timeo = msecs_to_jiffies(100);
  38. struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc;
  39. @@ -819,7 +819,7 @@ static int bcm_qspi_bspi_flash_read(stru
  40. bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0);
  41. /*
  42. - * when using flex mode we need to send
  43. + * when using flex mode mode we need to send
  44. * the upper address byte to bspi
  45. */
  46. if (bcm_qspi_bspi_ver_three(qspi) == false) {
  47. @@ -833,56 +833,47 @@ static int bcm_qspi_bspi_flash_read(stru
  48. else
  49. addr = msg->from & 0x00ffffff;
  50. + /* set BSPI RAF buffer max read length */
  51. + len = msg->len;
  52. + if (len > BSPI_READ_LENGTH)
  53. + len = BSPI_READ_LENGTH;
  54. +
  55. if (bcm_qspi_bspi_ver_three(qspi) == true)
  56. addr = (addr + 0xc00000) & 0xffffff;
  57. - /*
  58. - * read into the entire buffer by breaking the reads
  59. - * into RAF buffer read lengths
  60. - */
  61. - len = msg->len;
  62. + reinit_completion(&qspi->bspi_done);
  63. + bcm_qspi_enable_bspi(qspi);
  64. + len_words = (len + 3) >> 2;
  65. + qspi->bspi_rf_msg = msg;
  66. + qspi->bspi_rf_msg_status = 0;
  67. qspi->bspi_rf_msg_idx = 0;
  68. + qspi->bspi_rf_msg_len = len;
  69. + dev_dbg(&qspi->pdev->dev, "bspi xfr addr 0x%x len 0x%x", addr, len);
  70. - do {
  71. - if (len > BSPI_READ_LENGTH)
  72. - rdlen = BSPI_READ_LENGTH;
  73. - else
  74. - rdlen = len;
  75. -
  76. - reinit_completion(&qspi->bspi_done);
  77. - bcm_qspi_enable_bspi(qspi);
  78. - len_words = (rdlen + 3) >> 2;
  79. - qspi->bspi_rf_msg = msg;
  80. - qspi->bspi_rf_msg_status = 0;
  81. - qspi->bspi_rf_msg_len = rdlen;
  82. - dev_dbg(&qspi->pdev->dev,
  83. - "bspi xfr addr 0x%x len 0x%x", addr, rdlen);
  84. - bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr);
  85. - bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words);
  86. - bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0);
  87. - if (qspi->soc_intc) {
  88. - /*
  89. - * clear soc MSPI and BSPI interrupts and enable
  90. - * BSPI interrupts.
  91. - */
  92. - soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_BSPI_DONE);
  93. - soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, true);
  94. - }
  95. + bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr);
  96. + bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words);
  97. + bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0);
  98. +
  99. + if (qspi->soc_intc) {
  100. + /*
  101. + * clear soc MSPI and BSPI interrupts and enable
  102. + * BSPI interrupts.
  103. + */
  104. + soc_intc->bcm_qspi_int_ack(soc_intc, MSPI_BSPI_DONE);
  105. + soc_intc->bcm_qspi_int_set(soc_intc, BSPI_DONE, true);
  106. + }
  107. - /* Must flush previous writes before starting BSPI operation */
  108. - mb();
  109. - bcm_qspi_bspi_lr_start(qspi);
  110. - if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) {
  111. - dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n");
  112. - ret = -ETIMEDOUT;
  113. - break;
  114. - }
  115. + /* Must flush previous writes before starting BSPI operation */
  116. + mb();
  117. - /* set msg return length */
  118. - msg->retlen += rdlen;
  119. - addr += rdlen;
  120. - len -= rdlen;
  121. - } while (len);
  122. + bcm_qspi_bspi_lr_start(qspi);
  123. + if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) {
  124. + dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n");
  125. + ret = -ETIMEDOUT;
  126. + } else {
  127. + /* set the return length for the caller */
  128. + msg->retlen = len;
  129. + }
  130. return ret;
  131. }