| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123 |
- From 1fc7d5523e21ed140fed43c4dde011a3b6d9ba08 Mon Sep 17 00:00:00 2001
- From: John Crispin <[email protected]>
- Date: Tue, 24 Jul 2018 14:47:55 +0200
- Subject: [PATCH 3/3] qcom: ipq4019: add USB devicetree nodes
- This patch makes USB work on the Dakota EVB.
- Signed-off-by: John Crispin <[email protected]>
- ---
- arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 74 +++++++++++++++++++++++++++
- 2 files changed, 94 insertions(+)
- --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
- +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
- @@ -101,5 +101,25 @@
- wifi@a800000 {
- status = "ok";
- };
- +
- + usb3_ss_phy: ssphy@9a000 {
- + status = "ok";
- + };
- +
- + usb3_hs_phy: hsphy@a6000 {
- + status = "ok";
- + };
- +
- + usb3: usb3@8af8800 {
- + status = "ok";
- + };
- +
- + usb2_hs_phy: hsphy@a8000 {
- + status = "ok";
- + };
- +
- + usb2: usb2@60f8800 {
- + status = "ok";
- + };
- };
- };
- --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
- +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
- @@ -410,5 +410,79 @@
- "legacy";
- status = "disabled";
- };
- +
- + usb3_ss_phy: ssphy@9a000 {
- + compatible = "qcom,usb-ss-ipq4019-phy";
- + #phy-cells = <0>;
- + reg = <0x9a000 0x800>;
- + reg-names = "phy_base";
- + resets = <&gcc USB3_UNIPHY_PHY_ARES>;
- + reset-names = "por_rst";
- + status = "disabled";
- + };
- +
- + usb3_hs_phy: hsphy@a6000 {
- + compatible = "qcom,usb-hs-ipq4019-phy";
- + #phy-cells = <0>;
- + reg = <0xa6000 0x40>;
- + reg-names = "phy_base";
- + resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
- + reset-names = "por_rst", "srif_rst";
- + status = "disabled";
- + };
- +
- + usb3@8af8800 {
- + compatible = "qcom,dwc3";
- + reg = <0x8af8800 0x100>;
- + #address-cells = <1>;
- + #size-cells = <1>;
- + clocks = <&gcc GCC_USB3_MASTER_CLK>,
- + <&gcc GCC_USB3_SLEEP_CLK>,
- + <&gcc GCC_USB3_MOCK_UTMI_CLK>;
- + clock-names = "master", "sleep", "mock_utmi";
- + ranges;
- + status = "disabled";
- +
- + dwc3@8a00000 {
- + compatible = "snps,dwc3";
- + reg = <0x8a00000 0xf8000>;
- + interrupts = <0 132 0>;
- + phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
- + phy-names = "usb2-phy", "usb3-phy";
- + dr_mode = "host";
- + };
- + };
- +
- + usb2_hs_phy: hsphy@a8000 {
- + compatible = "qcom,usb-hs-ipq4019-phy";
- + #phy-cells = <0>;
- + reg = <0xa8000 0x40>;
- + reg-names = "phy_base";
- + resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
- + reset-names = "por_rst", "srif_rst";
- + status = "disabled";
- + };
- +
- + usb2@60f8800 {
- + compatible = "qcom,dwc3";
- + reg = <0x60f8800 0x100>;
- + #address-cells = <1>;
- + #size-cells = <1>;
- + clocks = <&gcc GCC_USB2_MASTER_CLK>,
- + <&gcc GCC_USB2_SLEEP_CLK>,
- + <&gcc GCC_USB2_MOCK_UTMI_CLK>;
- + clock-names = "master", "sleep", "mock_utmi";
- + ranges;
- + status = "disabled";
- +
- + dwc3@6000000 {
- + compatible = "snps,dwc3";
- + reg = <0x6000000 0xf8000>;
- + interrupts = <0 136 0>;
- + phys = <&usb2_hs_phy>;
- + phy-names = "usb2-phy";
- + dr_mode = "host";
- + };
- + };
- };
- };
|
