080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch 4.3 KB

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  1. From: Christian Lamparter <[email protected]>
  2. Date: Thu, 12 Apr 2018 21:01:38 +0200
  3. Subject: [PATCH] pinctrl: msm: fix gpio-hog related boot issues
  4. Sven Eckelmann reported an issue with the current IPQ4019 pinctrl.
  5. Setting up any gpio-hog in the device-tree for his device would
  6. "kill the bootup completely":
  7. | [ 0.477838] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe
  8. | [ 0.499828] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferring probe
  9. | [ 1.298883] requesting hog GPIO enable USB2 power (chip 1000000.pinctrl, offset 58) failed, -517
  10. | [ 1.299609] gpiochip_add_data: GPIOs 0..99 (1000000.pinctrl) failed to register
  11. | [ 1.308589] ipq4019-pinctrl 1000000.pinctrl: Failed register gpiochip
  12. | [ 1.316586] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe
  13. | [ 1.322415] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferri
  14. This was also verified on a RT-AC58U (IPQ4018) which would
  15. no longer boot, if a gpio-hog was specified. (Tried forcing
  16. the USB LED PIN (GPIO0) to high.).
  17. The problem is that Pinctrl+GPIO registration is currently
  18. peformed in the following order in pinctrl-msm.c:
  19. 1. pinctrl_register()
  20. 2. gpiochip_add()
  21. 3. gpiochip_add_pin_range()
  22. The actual error code -517 == -EPROBE_DEFER is coming from
  23. pinctrl_get_device_gpio_range(), which is called through:
  24. gpiochip_add
  25. of_gpiochip_add
  26. of_gpiochip_scan_gpios
  27. gpiod_hog
  28. gpiochip_request_own_desc
  29. __gpiod_request
  30. chip->request
  31. gpiochip_generic_request
  32. pinctrl_gpio_request
  33. pinctrl_get_device_gpio_range
  34. pinctrl_get_device_gpio_range() is unable to find any valid
  35. pin ranges, since nothing has been added to the pinctrldev_list yet.
  36. so the range can't be found, and the operation fails with -EPROBE_DEFER.
  37. This patch fixes the issue by adding the "gpio-ranges" property to
  38. the pinctrl device node of all upstream Qcom SoC. The pin ranges are
  39. then added by the gpio core.
  40. In order to remain compatible with older, existing DTs (and ACPI)
  41. a check for the "gpio-ranges" property has been added to
  42. msm_gpio_init(). This prevents the driver of adding the same entry
  43. to the pinctrldev_list twice.
  44. Reported-by: Sven Eckelmann <[email protected]>
  45. Signed-off-by: Christian Lamparter <[email protected]>
  46. Origin: other, https://patchwork.kernel.org/patch/10339127/
  47. ---
  48. arch/arm/boot/dts/qcom-ipq4019.dtsi | 1 +
  49. drivers/pinctrl/qcom/pinctrl-msm.c | 23 ++++++++++++++++++-----
  50. 14 files changed, 32 insertions(+), 6 deletions(-)
  51. --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
  52. +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
  53. @@ -182,6 +182,7 @@
  54. compatible = "qcom,ipq4019-pinctrl";
  55. reg = <0x01000000 0x300000>;
  56. gpio-controller;
  57. + gpio-ranges = <&tlmm 0 0 100>;
  58. #gpio-cells = <2>;
  59. interrupt-controller;
  60. #interrupt-cells = <2>;
  61. --- a/drivers/pinctrl/qcom/pinctrl-msm.c
  62. +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
  63. @@ -839,11 +839,24 @@ static int msm_gpio_init(struct msm_pinc
  64. return ret;
  65. }
  66. - ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);
  67. - if (ret) {
  68. - dev_err(pctrl->dev, "Failed to add pin range\n");
  69. - gpiochip_remove(&pctrl->chip);
  70. - return ret;
  71. + /*
  72. + * For DeviceTree-supported systems, the gpio core checks the
  73. + * pinctrl's device node for the "gpio-ranges" property.
  74. + * If it is present, it takes care of adding the pin ranges
  75. + * for the driver. In this case the driver can skip ahead.
  76. + *
  77. + * In order to remain compatible with older, existing DeviceTree
  78. + * files which don't set the "gpio-ranges" property or systems that
  79. + * utilize ACPI the driver has to call gpiochip_add_pin_range().
  80. + */
  81. + if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {
  82. + ret = gpiochip_add_pin_range(&pctrl->chip,
  83. + dev_name(pctrl->dev), 0, 0, chip->ngpio);
  84. + if (ret) {
  85. + dev_err(pctrl->dev, "Failed to add pin range\n");
  86. + gpiochip_remove(&pctrl->chip);
  87. + return ret;
  88. + }
  89. }
  90. ret = gpiochip_irqchip_add(chip,