openwrt/target/linux/ramips/dts/rt2880.dtsi

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ralink,rt2880-soc";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "mips,mips24KEc";
			reg = <0>;
		};
	};

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	aliases {
		serial0 = &uartlite;
	};

	cpuintc: cpuintc {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	palmbus: palmbus@300000 {
		compatible = "palmbus";
		reg = <0x300000 0x200000>;
		ranges = <0x0 0x300000 0x1FFFFF>;

		#address-cells = <1>;
		#size-cells = <1>;

		sysc: sysc@0 {
			compatible = "ralink,rt2880-sysc";
			reg = <0x000 0x100>;
		};

		timer: timer@100 {
			compatible = "ralink,rt2880-timer";
			reg = <0x100 0x20>;

			interrupt-parent = <&intc>;
			interrupts = <1>;

			status = "disabled";
		};

		watchdog: watchdog@120 {
			compatible = "ralink,rt2880-wdt";
			reg = <0x120 0x10>;
		};

		intc: intc@200 {
			compatible = "ralink,rt2880-intc";
			reg = <0x200 0x100>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
		};

		memc: memc@300 {
			compatible = "ralink,rt2880-memc";
			reg = <0x300 0x100>;
		};

		gpio0: gpio@600 {
			compatible = "ralink,rt2880-gpio";
			reg = <0x600 0x34>;

			gpio-controller;
			#gpio-cells = <2>;

			ralink,gpio-base = <0>;
			ralink,nr-gpio = <24>;
			ralink,register-map = [ 00 04 08 0c
						20 24 28 2c
						30 34 ];
		};

		gpio1: gpio@638 {
			compatible = "ralink,rt2880-gpio";
			reg = <0x638 0x24>;

			gpio-controller;
			#gpio-cells = <2>;

			ralink,gpio-base = <24>;
			ralink,nr-gpio = <16>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		gpio2: gpio@660 {
			compatible = "ralink,rt2880-gpio";
			reg = <0x660 0x24>;

			gpio-controller;
			#gpio-cells = <2>;

			ralink,gpio-base = <40>;
			ralink,nr-gpio = <32>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		i2c: i2c@900 {
			compatible = "ralink,rt2880-i2c";
			reg = <0x900 0x100>;

			resets = <&rstctrl 9>;
			reset-names = "i2c";

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";

			pinctrl-names = "default";
			pinctrl-0 = <&i2c_pins>;
		};

		uartlite: uartlite@c00 {
			compatible = "ralink,rt2880-uart", "ns16550a";
			reg = <0xc00 0x100>;

			interrupt-parent = <&intc>;
			interrupts = <8>;

			reg-shift = <2>;
		};
	};

	pinctrl: pinctrl {
		compatible = "ralink,rt2880-pinmux";

		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinctrl0 {
			sdram {
				ralink,group = "sdram";
				ralink,function = "sdram";
			};
		};

		i2c_pins: i2c_pins {
			i2c_pins {
				ralink,group = "i2c";
				ralink,function = "i2c";
			};
		};

		spi_pins: spi_pins {
			spi_pins {
				ralink,group = "spi";
				ralink,function = "spi";
			};
		};

		uartlite_pins: uartlite {
			uart {
				ralink,group = "uartlite";
				ralink,function = "uartlite";
			};
		};
	};

	rstctrl: rstctrl {
		compatible = "ralink,rt2880-reset";
		#reset-cells = <1>;
	};

	clkctrl: clkctrl {
		compatible = "ralink,rt2880-clock";
		#clock-cells = <1>;
	};

	pci: pci@440000 {
		compatible = "ralink,rt288x-pci";
		reg = <0x00440000 0x20000>;
		#address-cells = <3>;
		#size-cells = <2>;
		status = "disabled";
	};

	ethernet: ethernet@400000 {
		compatible = "ralink,rt2880-eth";
		reg = <0x00400000 0x10000>;

		#address-cells = <1>;
		#size-cells = <0>;

		resets = <&rstctrl 18>;
		reset-names = "fe";

		interrupt-parent = <&cpuintc>;
		interrupts = <5>;

		status = "disabled";

		port@0 {
			compatible = "ralink,rt2880-port", "mediatek,eth-port";
			reg = <0>;
		};

		mdio-bus {
			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";
		};
	};

	wmac: wmac@480000 {
		compatible = "ralink,rt2880-wmac";
		reg = <0x480000 0x40000>;

		interrupt-parent = <&cpuintc>;
		interrupts = <6>;

		ralink,eeprom = "soc_wmac.eeprom";
	};
};