soc_rt2880.c 2.1 KB

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  1. /* This program is free software; you can redistribute it and/or modify
  2. * it under the terms of the GNU General Public License as published by
  3. * the Free Software Foundation; version 2 of the License
  4. *
  5. * This program is distributed in the hope that it will be useful,
  6. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  7. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  8. * GNU General Public License for more details.
  9. *
  10. * Copyright (C) 2009-2015 John Crispin <[email protected]>
  11. * Copyright (C) 2009-2015 Felix Fietkau <[email protected]>
  12. * Copyright (C) 2013-2015 Michael Lee <[email protected]>
  13. */
  14. #include <linux/module.h>
  15. #include <asm/mach-ralink/ralink_regs.h>
  16. #include "mtk_eth_soc.h"
  17. #include "mdio_rt2880.h"
  18. #define RT2880_RESET_FE BIT(18)
  19. static void rt2880_init_data(struct fe_soc_data *data,
  20. struct net_device *netdev)
  21. {
  22. struct fe_priv *priv = netdev_priv(netdev);
  23. priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG |
  24. FE_FLAG_JUMBO_FRAME | FE_FLAG_CALIBRATE_CLK;
  25. netdev->hw_features = NETIF_F_SG | NETIF_F_HW_VLAN_CTAG_TX;
  26. /* this should work according to the datasheet but actually does not*/
  27. /* netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM; */
  28. }
  29. void rt2880_fe_reset(void)
  30. {
  31. fe_reset(RT2880_RESET_FE);
  32. }
  33. static int rt2880_fwd_config(struct fe_priv *priv)
  34. {
  35. int ret;
  36. ret = fe_set_clock_cycle(priv);
  37. if (ret)
  38. return ret;
  39. fe_fwd_config(priv);
  40. fe_w32(FE_PSE_FQFC_CFG_INIT, FE_PSE_FQ_CFG);
  41. fe_csum_config(priv);
  42. return ret;
  43. }
  44. struct fe_soc_data rt2880_data = {
  45. .init_data = rt2880_init_data,
  46. .reset_fe = rt2880_fe_reset,
  47. .fwd_config = rt2880_fwd_config,
  48. .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
  49. .checksum_bit = RX_DMA_L4VALID,
  50. .rx_int = FE_RX_DONE_INT,
  51. .tx_int = FE_TX_DONE_INT,
  52. .status_int = FE_CNT_GDM_AF,
  53. .mdio_read = rt2880_mdio_read,
  54. .mdio_write = rt2880_mdio_write,
  55. .mdio_adjust_link = rt2880_mdio_link_adjust,
  56. .port_init = rt2880_port_init,
  57. };
  58. const struct of_device_id of_fe_match[] = {
  59. { .compatible = "ralink,rt2880-eth", .data = &rt2880_data },
  60. {},
  61. };
  62. MODULE_DEVICE_TABLE(of, of_fe_match);