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cacheops.h 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Cache operations for the cache instruction.
  4. *
  5. * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
  6. * (C) Copyright 1999 Silicon Graphics, Inc.
  7. */
  8. #ifndef __ASM_CACHEOPS_H
  9. #define __ASM_CACHEOPS_H
  10. /*
  11. * Cache Operations available on all MIPS processors with R4000-style caches
  12. */
  13. #define Index_Invalidate_I 0x00
  14. #define Index_Writeback_Inv_D 0x01
  15. #define Index_Load_Tag_I 0x04
  16. #define Index_Load_Tag_D 0x05
  17. #define Index_Store_Tag_I 0x08
  18. #define Index_Store_Tag_D 0x09
  19. #if defined(CONFIG_CPU_LOONGSON2)
  20. #define Hit_Invalidate_I 0x00
  21. #else
  22. #define Hit_Invalidate_I 0x10
  23. #endif
  24. #define Hit_Invalidate_D 0x11
  25. #define Hit_Writeback_Inv_D 0x15
  26. /*
  27. * R4000-specific cacheops
  28. */
  29. #define Create_Dirty_Excl_D 0x0d
  30. #define Fill 0x14
  31. #define Hit_Writeback_I 0x18
  32. #define Hit_Writeback_D 0x19
  33. /*
  34. * R4000SC and R4400SC-specific cacheops
  35. */
  36. #define Index_Invalidate_SI 0x02
  37. #define Index_Writeback_Inv_SD 0x03
  38. #define Index_Load_Tag_SI 0x06
  39. #define Index_Load_Tag_SD 0x07
  40. #define Index_Store_Tag_SI 0x0A
  41. #define Index_Store_Tag_SD 0x0B
  42. #define Create_Dirty_Excl_SD 0x0f
  43. #define Hit_Invalidate_SI 0x12
  44. #define Hit_Invalidate_SD 0x13
  45. #define Hit_Writeback_Inv_SD 0x17
  46. #define Hit_Writeback_SD 0x1b
  47. #define Hit_Set_Virtual_SI 0x1e
  48. #define Hit_Set_Virtual_SD 0x1f
  49. /*
  50. * R5000-specific cacheops
  51. */
  52. #define R5K_Page_Invalidate_S 0x17
  53. /*
  54. * RM7000-specific cacheops
  55. */
  56. #define Page_Invalidate_T 0x16
  57. /*
  58. * R10000-specific cacheops
  59. *
  60. * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
  61. * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
  62. */
  63. #define Index_Writeback_Inv_S 0x03
  64. #define Index_Load_Tag_S 0x07
  65. #define Index_Store_Tag_S 0x0B
  66. #define Hit_Invalidate_S 0x13
  67. #define Cache_Barrier 0x14
  68. #define Hit_Writeback_Inv_S 0x17
  69. #define Index_Load_Data_I 0x18
  70. #define Index_Load_Data_D 0x19
  71. #define Index_Load_Data_S 0x1b
  72. #define Index_Store_Data_I 0x1c
  73. #define Index_Store_Data_D 0x1d
  74. #define Index_Store_Data_S 0x1f
  75. #endif /* __ASM_CACHEOPS_H */