302-dts-0017-arm64-dts-ls104x-make-dma-coherent-global-to-the-SoC.patch 2.1 KB

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  1. From b1e679aba75e5e137c70bc76169c34835ef0e474 Mon Sep 17 00:00:00 2001
  2. From: Laurentiu Tudor <[email protected]>
  3. Date: Tue, 24 Jul 2018 13:11:03 +0300
  4. Subject: [PATCH] arm64: dts: ls104x: make dma-coherent global to the SoC
  5. These SoCs are really completely dma coherent in their entirety so add
  6. the dma-coherent property at the soc level in the device tree and drop
  7. the instances where it's specifically added to a few select devices.
  8. Signed-off-by: Laurentiu Tudor <[email protected]>
  9. ---
  10. arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 +----
  11. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
  12. 2 files changed, 2 insertions(+), 4 deletions(-)
  13. --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
  14. +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
  15. @@ -219,6 +219,7 @@
  16. #size-cells = <2>;
  17. ranges;
  18. dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
  19. + dma-coherent;
  20. clockgen: clocking@1ee1000 {
  21. compatible = "fsl,ls1043a-clockgen";
  22. @@ -772,7 +773,6 @@
  23. reg-names = "ahci", "sata-ecc";
  24. interrupts = <0 69 0x4>;
  25. clocks = <&clockgen 4 0>;
  26. - dma-coherent;
  27. };
  28. msi1: msi-controller1@1571000 {
  29. @@ -807,7 +807,6 @@
  30. #address-cells = <3>;
  31. #size-cells = <2>;
  32. device_type = "pci";
  33. - dma-coherent;
  34. iommu-map = <0 &smmu 0 1>; /* update by bootloader */
  35. num-viewport = <6>;
  36. bus-range = <0x0 0xff>;
  37. @@ -834,7 +833,6 @@
  38. #address-cells = <3>;
  39. #size-cells = <2>;
  40. device_type = "pci";
  41. - dma-coherent;
  42. iommu-map = <0 &smmu 0 1>; /* update by bootloader */
  43. num-viewport = <6>;
  44. bus-range = <0x0 0xff>;
  45. @@ -861,7 +859,6 @@
  46. #address-cells = <3>;
  47. #size-cells = <2>;
  48. device_type = "pci";
  49. - dma-coherent;
  50. iommu-map = <0 &smmu 0 1>; /* update by bootloader */
  51. num-viewport = <6>;
  52. bus-range = <0x0 0xff>;
  53. --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
  54. +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
  55. @@ -191,6 +191,7 @@
  56. #size-cells = <2>;
  57. ranges;
  58. dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
  59. + dma-coherent;
  60. ddr: memory-controller@1080000 {
  61. compatible = "fsl,qoriq-memory-controller";