ramips.c 14 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; version 2 of the License
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  14. *
  15. * Copyright (C) 2009 John Crispin <[email protected]>
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/init.h>
  22. #include <linux/skbuff.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/platform_device.h>
  26. #include <ramips_eth_platform.h>
  27. #include "ramips_eth.h"
  28. #define TX_TIMEOUT (20 * HZ / 100)
  29. #define MAX_RX_LENGTH 1600
  30. #ifdef CONFIG_RALINK_RT305X
  31. #include "ramips_esw.c"
  32. #else
  33. static inline int rt305x_esw_init(void) { return 0; }
  34. static inline void rt305x_esw_exit(void) { }
  35. #endif
  36. #define phys_to_bus(a) (a & 0x1FFFFFFF)
  37. static struct net_device * ramips_dev;
  38. static void __iomem *ramips_fe_base = 0;
  39. static inline void
  40. ramips_fe_wr(u32 val, unsigned reg)
  41. {
  42. __raw_writel(val, ramips_fe_base + reg);
  43. }
  44. static inline u32
  45. ramips_fe_rr(unsigned reg)
  46. {
  47. return __raw_readl(ramips_fe_base + reg);
  48. }
  49. static inline void
  50. ramips_fe_int_disable(u32 mask)
  51. {
  52. ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
  53. RAMIPS_FE_INT_ENABLE);
  54. /* flush write */
  55. ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
  56. }
  57. static inline void
  58. ramips_fe_int_enable(u32 mask)
  59. {
  60. ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
  61. RAMIPS_FE_INT_ENABLE);
  62. /* flush write */
  63. ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
  64. }
  65. static inline void
  66. ramips_hw_set_macaddr(unsigned char *mac)
  67. {
  68. ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
  69. ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
  70. RAMIPS_GDMA1_MAC_ADRL);
  71. }
  72. #ifdef CONFIG_RALINK_RT288X
  73. static void
  74. ramips_setup_mdio_cfg(struct raeth_priv *re)
  75. {
  76. unsigned int mdio_cfg;
  77. mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
  78. RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
  79. RAMIPS_MDIO_CFG_GP1_FRC_EN;
  80. if (re->duplex == DUPLEX_FULL)
  81. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
  82. if (re->tx_fc)
  83. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
  84. if (re->rx_fc)
  85. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
  86. switch (re->speed) {
  87. case SPEED_10:
  88. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
  89. break;
  90. case SPEED_100:
  91. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
  92. break;
  93. case SPEED_1000:
  94. mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
  95. break;
  96. default:
  97. BUG();
  98. }
  99. ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
  100. }
  101. #else
  102. static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
  103. {
  104. }
  105. #endif /* CONFIG_RALINK_RT288X */
  106. static void
  107. ramips_cleanup_dma(struct raeth_priv *re)
  108. {
  109. int i;
  110. for (i = 0; i < NUM_RX_DESC; i++)
  111. if (re->rx_skb[i])
  112. dev_kfree_skb_any(re->rx_skb[i]);
  113. if (re->rx)
  114. dma_free_coherent(NULL,
  115. NUM_RX_DESC * sizeof(struct ramips_rx_dma),
  116. re->rx, re->phy_rx);
  117. if (re->tx)
  118. dma_free_coherent(NULL,
  119. NUM_TX_DESC * sizeof(struct ramips_tx_dma),
  120. re->tx, re->phy_tx);
  121. }
  122. static int
  123. ramips_alloc_dma(struct raeth_priv *re)
  124. {
  125. int err = -ENOMEM;
  126. int i;
  127. re->skb_free_idx = 0;
  128. /* setup tx ring */
  129. re->tx = dma_alloc_coherent(NULL,
  130. NUM_TX_DESC * sizeof(struct ramips_tx_dma),
  131. &re->phy_tx, GFP_ATOMIC);
  132. if (!re->tx)
  133. goto err_cleanup;
  134. memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
  135. for (i = 0; i < NUM_TX_DESC; i++) {
  136. re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
  137. re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
  138. }
  139. /* setup rx ring */
  140. re->rx = dma_alloc_coherent(NULL,
  141. NUM_RX_DESC * sizeof(struct ramips_rx_dma),
  142. &re->phy_rx, GFP_ATOMIC);
  143. if (!re->rx)
  144. goto err_cleanup;
  145. memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
  146. for (i = 0; i < NUM_RX_DESC; i++) {
  147. struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
  148. NET_IP_ALIGN);
  149. if (!new_skb)
  150. goto err_cleanup;
  151. skb_reserve(new_skb, NET_IP_ALIGN);
  152. re->rx[i].rxd1 = dma_map_single(NULL,
  153. new_skb->data,
  154. MAX_RX_LENGTH,
  155. DMA_FROM_DEVICE);
  156. re->rx[i].rxd2 |= RX_DMA_LSO;
  157. re->rx_skb[i] = new_skb;
  158. }
  159. return 0;
  160. err_cleanup:
  161. ramips_cleanup_dma(re);
  162. return err;
  163. }
  164. static void
  165. ramips_setup_dma(struct raeth_priv *re)
  166. {
  167. ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
  168. ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
  169. ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
  170. ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
  171. ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
  172. ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
  173. ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
  174. ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
  175. }
  176. static int
  177. ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  178. {
  179. struct raeth_priv *priv = netdev_priv(dev);
  180. unsigned long tx;
  181. unsigned int tx_next;
  182. unsigned int mapped_addr;
  183. unsigned long flags;
  184. if (priv->plat->min_pkt_len) {
  185. if (skb->len < priv->plat->min_pkt_len) {
  186. if (skb_padto(skb, priv->plat->min_pkt_len)) {
  187. printk(KERN_ERR
  188. "ramips_eth: skb_padto failed\n");
  189. kfree_skb(skb);
  190. return 0;
  191. }
  192. skb_put(skb, priv->plat->min_pkt_len - skb->len);
  193. }
  194. }
  195. dev->trans_start = jiffies;
  196. mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
  197. DMA_TO_DEVICE);
  198. dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
  199. spin_lock_irqsave(&priv->page_lock, flags);
  200. tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
  201. tx_next = (tx + 1) % NUM_TX_DESC;
  202. if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
  203. !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
  204. !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
  205. goto out;
  206. priv->tx[tx].txd1 = mapped_addr;
  207. priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
  208. priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
  209. dev->stats.tx_packets++;
  210. dev->stats.tx_bytes += skb->len;
  211. priv->tx_skb[tx] = skb;
  212. wmb();
  213. ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
  214. spin_unlock_irqrestore(&priv->page_lock, flags);
  215. return NETDEV_TX_OK;
  216. out:
  217. spin_unlock_irqrestore(&priv->page_lock, flags);
  218. dev->stats.tx_dropped++;
  219. kfree_skb(skb);
  220. return NETDEV_TX_OK;
  221. }
  222. static void
  223. ramips_eth_rx_hw(unsigned long ptr)
  224. {
  225. struct net_device *dev = (struct net_device *) ptr;
  226. struct raeth_priv *priv = netdev_priv(dev);
  227. int rx;
  228. int max_rx = 16;
  229. while (max_rx) {
  230. struct sk_buff *rx_skb, *new_skb;
  231. rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
  232. if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
  233. break;
  234. max_rx--;
  235. new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
  236. /* Reuse the buffer on allocation failures */
  237. if (new_skb) {
  238. rx_skb = priv->rx_skb[rx];
  239. skb_put(rx_skb, RX_DMA_PLEN0(priv->rx[rx].rxd2));
  240. rx_skb->dev = dev;
  241. rx_skb->protocol = eth_type_trans(rx_skb, dev);
  242. rx_skb->ip_summed = CHECKSUM_NONE;
  243. dev->stats.rx_packets++;
  244. dev->stats.rx_bytes += rx_skb->len;
  245. netif_rx(rx_skb);
  246. priv->rx_skb[rx] = new_skb;
  247. skb_reserve(new_skb, NET_IP_ALIGN);
  248. priv->rx[rx].rxd1 = dma_map_single(NULL,
  249. new_skb->data,
  250. MAX_RX_LENGTH,
  251. DMA_FROM_DEVICE);
  252. }
  253. priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
  254. wmb();
  255. ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
  256. }
  257. if (max_rx == 0)
  258. tasklet_schedule(&priv->rx_tasklet);
  259. else
  260. ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
  261. }
  262. static void
  263. ramips_eth_tx_housekeeping(unsigned long ptr)
  264. {
  265. struct net_device *dev = (struct net_device*)ptr;
  266. struct raeth_priv *priv = netdev_priv(dev);
  267. while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
  268. (priv->tx_skb[priv->skb_free_idx])) {
  269. dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
  270. priv->tx_skb[priv->skb_free_idx] = 0;
  271. priv->skb_free_idx++;
  272. if (priv->skb_free_idx >= NUM_TX_DESC)
  273. priv->skb_free_idx = 0;
  274. }
  275. ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
  276. }
  277. static void
  278. ramips_eth_timeout(struct net_device *dev)
  279. {
  280. struct raeth_priv *priv = netdev_priv(dev);
  281. tasklet_schedule(&priv->tx_housekeeping_tasklet);
  282. }
  283. static irqreturn_t
  284. ramips_eth_irq(int irq, void *dev)
  285. {
  286. struct raeth_priv *priv = netdev_priv(dev);
  287. unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
  288. ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
  289. if (fe_int & RAMIPS_RX_DLY_INT) {
  290. ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
  291. tasklet_schedule(&priv->rx_tasklet);
  292. }
  293. if (fe_int & RAMIPS_TX_DLY_INT)
  294. ramips_eth_tx_housekeeping((unsigned long)dev);
  295. return IRQ_HANDLED;
  296. }
  297. static int
  298. ramips_eth_open(struct net_device *dev)
  299. {
  300. struct raeth_priv *priv = netdev_priv(dev);
  301. int err;
  302. err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
  303. dev->name, dev);
  304. if (err)
  305. return err;
  306. err = ramips_alloc_dma(priv);
  307. if (err)
  308. goto err_free_irq;
  309. ramips_hw_set_macaddr(dev->dev_addr);
  310. ramips_setup_dma(priv);
  311. ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
  312. (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
  313. RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
  314. RAMIPS_PDMA_GLO_CFG);
  315. ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
  316. ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
  317. ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
  318. RAMIPS_FE_GLO_CFG);
  319. tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
  320. (unsigned long)dev);
  321. tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
  322. ramips_setup_mdio_cfg(priv);
  323. ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
  324. ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
  325. ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
  326. ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
  327. RAMIPS_GDMA1_FWD_CFG);
  328. ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
  329. ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
  330. RAMIPS_CDMA_CSG_CFG);
  331. ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
  332. ramips_fe_wr(1, RAMIPS_FE_RST_GL);
  333. ramips_fe_wr(0, RAMIPS_FE_RST_GL);
  334. netif_start_queue(dev);
  335. return 0;
  336. err_free_irq:
  337. free_irq(dev->irq, dev);
  338. return err;
  339. }
  340. static int
  341. ramips_eth_stop(struct net_device *dev)
  342. {
  343. struct raeth_priv *priv = netdev_priv(dev);
  344. ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
  345. ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
  346. RAMIPS_PDMA_GLO_CFG);
  347. /* disable all interrupts in the hw */
  348. ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
  349. free_irq(dev->irq, dev);
  350. netif_stop_queue(dev);
  351. tasklet_kill(&priv->tx_housekeeping_tasklet);
  352. tasklet_kill(&priv->rx_tasklet);
  353. ramips_cleanup_dma(priv);
  354. printk(KERN_DEBUG "ramips_eth: stopped\n");
  355. return 0;
  356. }
  357. static int __init
  358. ramips_eth_probe(struct net_device *dev)
  359. {
  360. struct raeth_priv *priv = netdev_priv(dev);
  361. BUG_ON(!priv->plat->reset_fe);
  362. priv->plat->reset_fe();
  363. net_srandom(jiffies);
  364. memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
  365. ether_setup(dev);
  366. dev->mtu = 1500;
  367. dev->watchdog_timeo = TX_TIMEOUT;
  368. spin_lock_init(&priv->page_lock);
  369. return 0;
  370. }
  371. static const struct net_device_ops ramips_eth_netdev_ops = {
  372. .ndo_init = ramips_eth_probe,
  373. .ndo_open = ramips_eth_open,
  374. .ndo_stop = ramips_eth_stop,
  375. .ndo_start_xmit = ramips_eth_hard_start_xmit,
  376. .ndo_tx_timeout = ramips_eth_timeout,
  377. .ndo_change_mtu = eth_change_mtu,
  378. .ndo_set_mac_address = eth_mac_addr,
  379. .ndo_validate_addr = eth_validate_addr,
  380. };
  381. static int
  382. ramips_eth_plat_probe(struct platform_device *plat)
  383. {
  384. struct raeth_priv *priv;
  385. struct ramips_eth_platform_data *data = plat->dev.platform_data;
  386. struct resource *res;
  387. int err;
  388. if (!data) {
  389. dev_err(&plat->dev, "no platform data specified\n");
  390. return -EINVAL;
  391. }
  392. res = platform_get_resource(plat, IORESOURCE_MEM, 0);
  393. if (!res) {
  394. dev_err(&plat->dev, "no memory resource found\n");
  395. return -ENXIO;
  396. }
  397. ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
  398. if (!ramips_fe_base)
  399. return -ENOMEM;
  400. ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
  401. if (!ramips_dev) {
  402. dev_err(&plat->dev, "alloc_etherdev failed\n");
  403. err = -ENOMEM;
  404. goto err_unmap;
  405. }
  406. strcpy(ramips_dev->name, "eth%d");
  407. ramips_dev->irq = platform_get_irq(plat, 0);
  408. if (ramips_dev->irq < 0) {
  409. dev_err(&plat->dev, "no IRQ resource found\n");
  410. err = -ENXIO;
  411. goto err_free_dev;
  412. }
  413. ramips_dev->addr_len = ETH_ALEN;
  414. ramips_dev->base_addr = (unsigned long)ramips_fe_base;
  415. ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
  416. priv = netdev_priv(ramips_dev);
  417. priv->speed = data->speed;
  418. priv->duplex = data->duplex;
  419. priv->rx_fc = data->rx_fc;
  420. priv->tx_fc = data->tx_fc;
  421. priv->plat = data;
  422. err = register_netdev(ramips_dev);
  423. if (err) {
  424. dev_err(&plat->dev, "error bringing up device\n");
  425. goto err_free_dev;
  426. }
  427. printk(KERN_DEBUG "ramips_eth: loaded\n");
  428. return 0;
  429. err_free_dev:
  430. kfree(ramips_dev);
  431. err_unmap:
  432. iounmap(ramips_fe_base);
  433. return err;
  434. }
  435. static int
  436. ramips_eth_plat_remove(struct platform_device *plat)
  437. {
  438. unregister_netdev(ramips_dev);
  439. free_netdev(ramips_dev);
  440. printk(KERN_DEBUG "ramips_eth: unloaded\n");
  441. return 0;
  442. }
  443. static struct platform_driver ramips_eth_driver = {
  444. .probe = ramips_eth_plat_probe,
  445. .remove = ramips_eth_plat_remove,
  446. .driver = {
  447. .name = "ramips_eth",
  448. .owner = THIS_MODULE,
  449. },
  450. };
  451. static int __init
  452. ramips_eth_init(void)
  453. {
  454. int ret;
  455. ret = rt305x_esw_init();
  456. if (ret)
  457. return ret;
  458. ret = platform_driver_register(&ramips_eth_driver);
  459. if (ret) {
  460. printk(KERN_ERR
  461. "ramips_eth: Error registering platfom driver!\n");
  462. goto esw_cleanup;
  463. }
  464. return 0;
  465. esw_cleanup:
  466. rt305x_esw_exit();
  467. return ret;
  468. }
  469. static void __exit
  470. ramips_eth_cleanup(void)
  471. {
  472. platform_driver_unregister(&ramips_eth_driver);
  473. rt305x_esw_exit();
  474. }
  475. module_init(ramips_eth_init);
  476. module_exit(ramips_eth_cleanup);
  477. MODULE_LICENSE("GPL");
  478. MODULE_AUTHOR("John Crispin <[email protected]>");
  479. MODULE_DESCRIPTION("ethernet driver for ramips boards");