ws-ap3825i.dts 5.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later or MIT
  2. /include/ "fsl/p1020si-pre.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. / {
  6. model = "Extreme Networks WS-AP3825i";
  7. compatible = "extreme-networks,ws-ap3825i";
  8. aliases {
  9. ethernet0 = &enet0;
  10. ethernet1 = &enet2;
  11. led-boot = &led_power_green;
  12. led-failsafe = &led_power_red;
  13. led-running = &led_power_green;
  14. led-upgrade = &led_power_red;
  15. };
  16. chosen {
  17. bootargs-override = "console=ttyS0,115200";
  18. };
  19. memory {
  20. device_type = "memory";
  21. };
  22. leds {
  23. compatible = "gpio-leds";
  24. wifi1 {
  25. gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
  26. label = "green:radio1";
  27. linux,default-trigger = "phy0tpt";
  28. };
  29. wifi2 {
  30. gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
  31. label = "green:radio2";
  32. linux,default-trigger = "phy1tpt";
  33. };
  34. led_power_green: power_green {
  35. gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
  36. label = "green:power";
  37. };
  38. led_power_red: power_red {
  39. gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
  40. label = "red:power";
  41. };
  42. lan1_red {
  43. gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
  44. label = "red:lan1";
  45. };
  46. lan1_green {
  47. gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
  48. label = "green:lan1";
  49. };
  50. lan2_red {
  51. gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
  52. label = "red:lan2";
  53. };
  54. lan2_green {
  55. gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
  56. label = "green:lan2";
  57. };
  58. };
  59. keys {
  60. compatible = "gpio-keys";
  61. reset {
  62. label = "Reset button";
  63. gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
  64. linux,code = <KEY_RESTART>;
  65. };
  66. };
  67. lbc: localbus@ffe05000 {
  68. reg = <0 0xffe05000 0 0x1000>;
  69. ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
  70. nor@0 {
  71. #address-cells = <1>;
  72. #size-cells = <1>;
  73. compatible = "cfi-flash";
  74. reg = <0x0 0x0 0x4000000>;
  75. bank-width = <2>;
  76. device-width = <1>;
  77. partitions {
  78. compatible = "fixed-partitions";
  79. #address-cells = <1>;
  80. #size-cells = <1>;
  81. partition@0 {
  82. compatible = "denx,fit";
  83. reg = <0x0 0x3d60000>;
  84. label = "firmware";
  85. };
  86. partition@3d60000 {
  87. reg = <0x3d60000 0x20000>;
  88. label = "calib";
  89. read-only;
  90. };
  91. partition@3d80000{
  92. reg = <0x3d80000 0x80000>;
  93. label = "u-boot";
  94. read-only;
  95. };
  96. partition@3e00000{
  97. reg = <0x3e00000 0x100000>;
  98. label = "nvram";
  99. read-only;
  100. };
  101. partition@3f00000 {
  102. reg = <0x3f00000 0x20000>;
  103. label = "cfg2";
  104. };
  105. partition@3f20000 {
  106. reg = <0x3f20000 0x20000>;
  107. label = "cfg1";
  108. };
  109. };
  110. };
  111. };
  112. soc: soc@ffe00000 {
  113. ranges = <0x0 0x0 0xffe00000 0x100000>;
  114. gpio0: gpio-controller@fc00 {
  115. };
  116. mdio@24000 {
  117. phy0: ethernet-phy@0 {
  118. interrupts = <3 1 0 0>;
  119. reg = <0x5>;
  120. reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  121. reset-assert-us = <10000>;
  122. reset-deassert-us = <10000>;
  123. };
  124. phy2: ethernet-phy@2 {
  125. interrupts = <1 1 0 0>;
  126. reg = <0x6>;
  127. reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  128. reset-assert-us = <10000>;
  129. reset-deassert-us = <10000>;
  130. };
  131. };
  132. mdio@25000 {
  133. status = "disabled";
  134. };
  135. mdio@26000 {
  136. status = "disabled";
  137. };
  138. enet0: ethernet@b0000 {
  139. status = "okay";
  140. phy-handle = <&phy0>;
  141. phy-connection-type = "rgmii-id";
  142. };
  143. enet1: ethernet@b1000 {
  144. status = "disabled";
  145. };
  146. enet2: ethernet@b2000 {
  147. status = "okay";
  148. phy-handle = <&phy2>;
  149. phy-connection-type = "rgmii-id";
  150. };
  151. usb@22000 {
  152. phy_type = "ulpi";
  153. dr_mode = "host";
  154. };
  155. usb@23000 {
  156. status = "disabled";
  157. };
  158. };
  159. pci0: pcie@ffe09000 {
  160. ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
  161. 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
  162. reg = <0 0xffe09000 0 0x1000>;
  163. pcie@0 {
  164. ranges = <0x2000000 0x0 0xa0000000
  165. 0x2000000 0x0 0xa0000000
  166. 0x0 0x20000000
  167. 0x1000000 0x0 0x0
  168. 0x1000000 0x0 0x0
  169. 0x0 0x100000>;
  170. };
  171. };
  172. pci1: pcie@ffe0a000 {
  173. reg = <0 0xffe0a000 0 0x1000>;
  174. ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
  175. 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
  176. pcie@0 {
  177. ranges = <0x2000000 0x0 0x80000000
  178. 0x2000000 0x0 0x80000000
  179. 0x0 0x20000000
  180. 0x1000000 0x0 0x0
  181. 0x1000000 0x0 0x0
  182. 0x0 0x100000>;
  183. };
  184. };
  185. };
  186. &soc {
  187. led_spi {
  188. /*
  189. * This is currently non-functioning because the spi-gpio
  190. * driver refuses to register when presented with this node.
  191. */
  192. compatible = "spi-gpio";
  193. #address-cells = <1>;
  194. #size-cells = <0>;
  195. sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  196. mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  197. num-chipselects = <0>;
  198. spi_gpio: led_gpio@0 {
  199. compatible = "fairchild,74hc595";
  200. reg = <0>;
  201. gpio-controller;
  202. #gpio-cells = <2>;
  203. registers-number = <1>;
  204. spi-max-frequency = <100000>;
  205. };
  206. };
  207. };
  208. /include/ "fsl/p1020si-post.dtsi"
  209. / {
  210. cpus {
  211. PowerPC,P1010@0 {
  212. bus-frequency = <399999996>;
  213. timebase-frequency = <50000000>;
  214. clock-frequency = <799999992>;
  215. d-cache-block-size = <0x20>;
  216. d-cache-size = <0x8000>;
  217. d-cache-sets = <0x80>;
  218. i-cache-block-size = <0x20>;
  219. i-cache-size = <0x8000>;
  220. i-cache-sets = <0x80>;
  221. };
  222. PowerPC,P1010@1 {
  223. bus-frequency = <399999996>;
  224. timebase-frequency = <50000000>;
  225. clock-frequency = <799999992>;
  226. d-cache-block-size = <0x20>;
  227. d-cache-size = <0x8000>;
  228. d-cache-sets = <0x80>;
  229. i-cache-block-size = <0x20>;
  230. i-cache-size = <0x8000>;
  231. i-cache-sets = <0x80>;
  232. };
  233. };
  234. memory {
  235. reg = <0x0 0x0 0x0 0x10000000>;
  236. };
  237. soc@ffe00000 {
  238. bus-frequency = <399999996>;
  239. serial@4600 {
  240. clock-frequency = <399999996>;
  241. };
  242. serial@4500 {
  243. clock-frequency = <399999996>;
  244. };
  245. pic@40000 {
  246. clock-frequency = <399999996>;
  247. };
  248. };
  249. };
  250. /*
  251. * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
  252. * aliases to determine PCI domain numbers, drop aliases so as not to
  253. * change the sysfs path of our wireless netdevs.
  254. */
  255. / {
  256. aliases {
  257. /delete-property/ pci0;
  258. /delete-property/ pci1;
  259. };
  260. };