qcom-ipq8064-db149.dts 2.3 KB

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  1. #include "qcom-ipq8064-v1.0.dtsi"
  2. / {
  3. model = "Qualcomm IPQ8064/DB149";
  4. compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
  5. aliases {
  6. serial0 = &gsbi2_serial;
  7. };
  8. reserved-memory {
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. ranges;
  12. rsvd@41200000 {
  13. reg = <0x41200000 0x300000>;
  14. no-map;
  15. };
  16. };
  17. };
  18. &qcom_pinmux {
  19. rgmii0_pins: rgmii0_pins {
  20. mux {
  21. pins = "gpio2", "gpio66";
  22. drive-strength = <8>;
  23. bias-disable;
  24. };
  25. };
  26. };
  27. &gsbi2 {
  28. qcom,mode = <GSBI_PROT_I2C_UART>;
  29. status = "okay";
  30. gsbi2_serial: serial@12490000 {
  31. status = "okay";
  32. };
  33. };
  34. &gsbi4 {
  35. status = "disabled";
  36. };
  37. &gsbi4_serial {
  38. status = "disabled";
  39. };
  40. &flash {
  41. m25p,fast-read;
  42. partition@0 {
  43. label = "lowlevel_init";
  44. reg = <0x0 0x1b0000>;
  45. };
  46. partition@1 {
  47. label = "u-boot";
  48. reg = <0x1b0000 0x80000>;
  49. };
  50. partition@2 {
  51. label = "u-boot-env";
  52. reg = <0x230000 0x40000>;
  53. };
  54. partition@3 {
  55. label = "caldata";
  56. reg = <0x270000 0x40000>;
  57. };
  58. partition@4 {
  59. label = "firmware";
  60. reg = <0x2b0000 0x1d50000>;
  61. };
  62. };
  63. &hs_phy_0 {
  64. status = "okay";
  65. };
  66. &ss_phy_0 {
  67. status = "okay";
  68. };
  69. &usb3_0 {
  70. status = "okay";
  71. };
  72. &hs_phy_1 {
  73. status = "okay";
  74. };
  75. &ss_phy_1 {
  76. status = "okay";
  77. };
  78. &usb3_1 {
  79. status = "okay";
  80. };
  81. &pcie0 {
  82. status = "okay";
  83. };
  84. &pcie1 {
  85. status = "okay";
  86. };
  87. &pcie2 {
  88. status = "okay";
  89. };
  90. &mdio0 {
  91. status = "okay";
  92. pinctrl-0 = <&mdio0_pins>;
  93. pinctrl-names = "default";
  94. phy0: ethernet-phy@0 {
  95. reg = <0>;
  96. qca,ar8327-initvals = <
  97. 0x00004 0x7600000 /* PAD0_MODE */
  98. 0x00008 0x1000000 /* PAD5_MODE */
  99. 0x0000c 0x80 /* PAD6_MODE */
  100. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  101. 0x000e0 0xc74164de /* SGMII_CTRL */
  102. 0x0007c 0x4e /* PORT0_STATUS */
  103. 0x00094 0x4e /* PORT6_STATUS */
  104. >;
  105. };
  106. phy4: ethernet-phy@4 {
  107. reg = <4>;
  108. };
  109. phy6: ethernet-phy@6 {
  110. reg = <6>;
  111. };
  112. phy7: ethernet-phy@7 {
  113. reg = <7>;
  114. };
  115. };
  116. &gmac0 {
  117. status = "okay";
  118. phy-mode = "rgmii";
  119. qcom,id = <0>;
  120. phy-handle = <&phy4>;
  121. pinctrl-0 = <&rgmii0_pins>;
  122. pinctrl-names = "default";
  123. };
  124. &gmac1 {
  125. status = "okay";
  126. phy-mode = "sgmii";
  127. qcom,id = <1>;
  128. fixed-link {
  129. speed = <1000>;
  130. full-duplex;
  131. };
  132. };
  133. &gmac2 {
  134. status = "okay";
  135. phy-mode = "sgmii";
  136. qcom,id = <2>;
  137. phy-handle = <&phy6>;
  138. };
  139. &gmac3 {
  140. status = "okay";
  141. phy-mode = "sgmii";
  142. qcom,id = <3>;
  143. phy-handle = <&phy7>;
  144. };