qcom-ipq8064-wg2600hp.dts 7.5 KB

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  1. #include "qcom-ipq8064-v2.0-smb208.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "NEC Aterm WG2600HP";
  5. compatible = "nec,wg2600hp", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. aliases {
  11. mdio-gpio0 = &mdio0;
  12. led-boot = &power_green;
  13. led-failsafe = &power_red;
  14. led-running = &power_green;
  15. led-upgrade = &power_green;
  16. };
  17. keys {
  18. compatible = "gpio-keys";
  19. pinctrl-0 = <&button_pins>;
  20. pinctrl-names = "default";
  21. wps {
  22. label = "wps";
  23. gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_WPS_BUTTON>;
  25. debounce-interval = <60>;
  26. wakeup-source;
  27. };
  28. reset {
  29. label = "reset";
  30. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  31. linux,code = <KEY_RESTART>;
  32. debounce-interval = <60>;
  33. wakeup-source;
  34. };
  35. bridge {
  36. label = "bridge";
  37. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  38. linux,code = <BTN_0>;
  39. linux,input-type = <EV_SW>;
  40. debounce-interval = <60>;
  41. wakeup-source;
  42. };
  43. converter {
  44. label = "converter";
  45. gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  46. linux,code = <BTN_0>;
  47. linux,input-type = <EV_SW>;
  48. debounce-interval = <60>;
  49. wakeup-source;
  50. };
  51. };
  52. leds {
  53. compatible = "gpio-leds";
  54. pinctrl-0 = <&led_pins>;
  55. pinctrl-names = "default";
  56. converter_green {
  57. label = "green:converter";
  58. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
  59. };
  60. power_red: power_red {
  61. label = "red:power";
  62. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  63. };
  64. active_green {
  65. label = "green:active";
  66. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  67. };
  68. active_red {
  69. label = "red:active";
  70. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  71. };
  72. power_green: power_green {
  73. label = "green:power";
  74. gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  75. };
  76. converter_red {
  77. label = "red:converter";
  78. gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  79. };
  80. wlan2g_green {
  81. label = "green:wlan2g";
  82. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
  83. };
  84. wlan2g_red {
  85. label = "red:wlan2g";
  86. gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
  87. };
  88. wlan5g_green {
  89. label = "green:wlan5g";
  90. gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
  91. };
  92. wlan5g_red {
  93. label = "red:wlan5g";
  94. gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
  95. };
  96. tv_green {
  97. label = "green:tv";
  98. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  99. };
  100. tv_red {
  101. label = "red:tv";
  102. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
  103. };
  104. };
  105. };
  106. &CPU_SPC {
  107. status = "disabled";
  108. };
  109. &adm_dma {
  110. status = "okay";
  111. };
  112. &mdio0 {
  113. status = "okay";
  114. pinctrl-0 = <&mdio0_pins>;
  115. pinctrl-names = "default";
  116. ethernet-phy@0 {
  117. reg = <0>;
  118. qca,ar8327-initvals = <
  119. 0x00004 0x06000000 /* PAD0_MODE */
  120. 0x0000c 0x00080080 /* PAD6_MODE */
  121. 0x000e4 0x0006a545 /* MAC_POWER_SEL */
  122. 0x000e0 0xc74164de /* SGMII_CTRL */
  123. 0x0007c 0x0000004e /* PORT0_STATUS */
  124. 0x00094 0x0000004e /* PORT6_STATUS */
  125. >;
  126. };
  127. ethernet-phy@4 {
  128. reg = <4>;
  129. };
  130. };
  131. &gmac1 {
  132. status = "okay";
  133. phy-mode = "rgmii";
  134. qcom,id = <1>;
  135. pinctrl-0 = <&rgmii2_pins>;
  136. pinctrl-names = "default";
  137. nvmem-cells = <&macaddr_PRODUCTDATA_6>;
  138. nvmem-cell-names = "mac-address";
  139. fixed-link {
  140. speed = <1000>;
  141. full-duplex;
  142. };
  143. };
  144. &gmac2 {
  145. status = "okay";
  146. phy-mode = "sgmii";
  147. qcom,id = <2>;
  148. nvmem-cells = <&macaddr_PRODUCTDATA_0>;
  149. nvmem-cell-names = "mac-address";
  150. fixed-link {
  151. speed = <1000>;
  152. full-duplex;
  153. };
  154. };
  155. &gsbi5 {
  156. status = "okay";
  157. qcom,mode = <GSBI_PROT_SPI>;
  158. spi@1a280000 {
  159. status = "okay";
  160. pinctrl-0 = <&spi_pins>;
  161. pinctrl-names = "default";
  162. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  163. flash@0 {
  164. compatible = "jedec,spi-nor";
  165. spi-max-frequency = <50000000>;
  166. reg = <0>;
  167. partitions {
  168. compatible = "fixed-partitions";
  169. #address-cells = <1>;
  170. #size-cells = <1>;
  171. SBL1@0 {
  172. label = "SBL1";
  173. reg = <0x0 0x20000>;
  174. read-only;
  175. };
  176. MIBIB@20000 {
  177. label = "MIBIB";
  178. reg = <0x20000 0x20000>;
  179. read-only;
  180. };
  181. SBL2@40000 {
  182. label = "SBL2";
  183. reg = <0x40000 0x40000>;
  184. read-only;
  185. };
  186. SBL3@80000 {
  187. label = "SBL3";
  188. reg = <0x80000 0x80000>;
  189. read-only;
  190. };
  191. DDRCONFIG@100000 {
  192. label = "DDRCONFIG";
  193. reg = <0x100000 0x10000>;
  194. read-only;
  195. };
  196. SSD@110000 {
  197. label = "SSD";
  198. reg = <0x110000 0x10000>;
  199. read-only;
  200. };
  201. TZ@120000 {
  202. label = "TZ";
  203. reg = <0x120000 0x80000>;
  204. read-only;
  205. };
  206. RPM@1a0000 {
  207. label = "RPM";
  208. reg = <0x1a0000 0x80000>;
  209. read-only;
  210. };
  211. APPSBL@220000 {
  212. label = "APPSBL";
  213. reg = <0x220000 0x80000>;
  214. read-only;
  215. };
  216. APPSBLENV@2a0000 {
  217. label = "APPSBLENV";
  218. reg = <0x2a0000 0x10000>;
  219. };
  220. PRODUCTDATA: PRODUCTDATA@2b0000 {
  221. label = "PRODUCTDATA";
  222. reg = <0x2b0000 0x30000>;
  223. read-only;
  224. };
  225. ART@2e0000 {
  226. label = "ART";
  227. reg = <0x2e0000 0x40000>;
  228. read-only;
  229. compatible = "nvmem-cells";
  230. #address-cells = <1>;
  231. #size-cells = <1>;
  232. precal_ART_1000: precal@1000 {
  233. reg = <0x1000 0x2f20>;
  234. };
  235. precal_ART_5000: precal@5000 {
  236. reg = <0x5000 0x2f20>;
  237. };
  238. };
  239. TP@320000 {
  240. label = "TP";
  241. reg = <0x320000 0x40000>;
  242. read-only;
  243. };
  244. TINY@360000 {
  245. label = "TINY";
  246. reg = <0x360000 0x500000>;
  247. read-only;
  248. };
  249. firmware@860000 {
  250. compatible = "denx,uimage";
  251. label = "firmware";
  252. reg = <0x860000 0x17a0000>;
  253. };
  254. };
  255. };
  256. };
  257. };
  258. &hs_phy_0 {
  259. status = "okay";
  260. };
  261. &ss_phy_0 {
  262. status = "okay";
  263. };
  264. &usb3_0 {
  265. status = "okay";
  266. pinctrl-0 = <&usb_pwr_en_pins>;
  267. pinctrl-names = "default";
  268. };
  269. &hs_phy_1 {
  270. status = "okay";
  271. };
  272. &ss_phy_1 {
  273. status = "okay";
  274. };
  275. &usb3_1 {
  276. status = "okay";
  277. };
  278. &pcie0 {
  279. status = "okay";
  280. bridge@0,0 {
  281. reg = <0x00000000 0 0 0 0>;
  282. #address-cells = <3>;
  283. #size-cells = <2>;
  284. ranges;
  285. wifi@1,0 {
  286. compatible = "pci168c,0040";
  287. reg = <0x00010000 0 0 0 0>;
  288. nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
  289. nvmem-cell-names = "mac-address", "pre-calibration";
  290. };
  291. };
  292. };
  293. &pcie1 {
  294. status = "okay";
  295. max-link-speed = <1>;
  296. bridge@0,0 {
  297. reg = <0x00000000 0 0 0 0>;
  298. #address-cells = <3>;
  299. #size-cells = <2>;
  300. ranges;
  301. wifi@1,0 {
  302. compatible = "pci168c,0040";
  303. reg = <0x00010000 0 0 0 0>;
  304. nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
  305. nvmem-cell-names = "mac-address", "pre-calibration";
  306. };
  307. };
  308. };
  309. &qcom_pinmux {
  310. button_pins: button_pins {
  311. mux {
  312. pins = "gpio16", "gpio54", "gpio24", "gpio25";
  313. function = "gpio";
  314. drive-strength = <2>;
  315. bias-pull-up;
  316. };
  317. };
  318. led_pins: led_pins {
  319. mux {
  320. pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
  321. "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
  322. "gpio64", "gpio65";
  323. function = "gpio";
  324. drive-strength = <2>;
  325. bias-pull-down;
  326. };
  327. };
  328. spi_pins: spi_pins {
  329. mux {
  330. pins = "gpio18", "gpio19", "gpio21";
  331. function = "gsbi5";
  332. bias-pull-down;
  333. };
  334. data {
  335. pins = "gpio18", "gpio19";
  336. drive-strength = <10>;
  337. };
  338. cs {
  339. pins = "gpio20";
  340. drive-strength = <10>;
  341. bias-pull-up;
  342. };
  343. clk {
  344. pins = "gpio21";
  345. drive-strength = <12>;
  346. };
  347. };
  348. usb_pwr_en_pins: usb_pwr_en_pins {
  349. mux {
  350. pins = "gpio22";
  351. function = "gpio";
  352. drive-strength = <2>;
  353. bias-pull-down;
  354. output-high;
  355. };
  356. };
  357. };
  358. &PRODUCTDATA {
  359. compatible = "nvmem-cells";
  360. #address-cells = <1>;
  361. #size-cells = <1>;
  362. macaddr_PRODUCTDATA_0: macaddr@0 {
  363. reg = <0x0 0x6>;
  364. };
  365. macaddr_PRODUCTDATA_6: macaddr@6 {
  366. reg = <0x6 0x6>;
  367. };
  368. macaddr_PRODUCTDATA_c: macaddr@c {
  369. reg = <0xc 0x6>;
  370. };
  371. macaddr_PRODUCTDATA_12: macaddr@12 {
  372. reg = <0x12 0x6>;
  373. };
  374. };