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qcom-ipq8064-wxr-2533dhp.dts 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq8064-v2.0-smb208.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. model = "Buffalo WXR-2533DHP";
  6. compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
  7. memory@42000000 {
  8. reg = <0x42000000 0x1e000000>;
  9. device_type = "memory";
  10. };
  11. aliases {
  12. led-boot = &power;
  13. led-failsafe = &diag;
  14. led-running = &power;
  15. led-upgrade = &power;
  16. };
  17. chosen {
  18. /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
  19. bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
  20. };
  21. leds {
  22. compatible = "gpio-leds";
  23. pinctrl-0 = <&led_pins>;
  24. pinctrl-names = "default";
  25. usb {
  26. label = "green:usb";
  27. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  28. linux,default-trigger = "usbport";
  29. trigger-sources = <&hub_port0 &hub_port1>;
  30. };
  31. guestport {
  32. label = "green:guestport";
  33. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  34. };
  35. diag: diag {
  36. label = "orange:diag";
  37. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  38. };
  39. internet_orange {
  40. label = "orange:internet";
  41. gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
  42. };
  43. internet_white {
  44. label = "white:internet";
  45. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  46. };
  47. wireless_orange {
  48. label = "orange:wireless";
  49. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  50. };
  51. wireless_white {
  52. label = "white:wireless";
  53. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  54. };
  55. router_orange {
  56. label = "orange:router";
  57. gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
  58. };
  59. router_white {
  60. label = "white:router";
  61. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  62. };
  63. power: power {
  64. label = "white:power";
  65. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  66. };
  67. };
  68. keys {
  69. compatible = "gpio-keys";
  70. pinctrl-0 = <&button_pins>;
  71. pinctrl-names = "default";
  72. power {
  73. label = "power";
  74. gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
  75. linux,code = <KEY_POWER>;
  76. debounce-interval = <60>;
  77. wakeup-source;
  78. };
  79. reset {
  80. label = "reset";
  81. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  82. linux,code = <KEY_RESTART>;
  83. debounce-interval = <60>;
  84. wakeup-source;
  85. };
  86. wps {
  87. label = "wps";
  88. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  89. linux,code = <KEY_WPS_BUTTON>;
  90. debounce-interval = <60>;
  91. wakeup-source;
  92. };
  93. eject {
  94. label = "eject";
  95. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  96. linux,code = <KEY_EJECTCD>;
  97. debounce-interval = <60>;
  98. wakeup-source;
  99. };
  100. guest {
  101. label = "guest";
  102. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  103. linux,code = <BTN_0>;
  104. debounce-interval = <60>;
  105. wakeup-source;
  106. };
  107. ap {
  108. label = "ap";
  109. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
  110. linux,code = <BTN_1>;
  111. linux,input-type = <EV_SW>;
  112. debounce-interval = <60>;
  113. wakeup-source;
  114. };
  115. router {
  116. label = "router";
  117. gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  118. linux,code = <BTN_1>;
  119. linux,input-type = <EV_SW>;
  120. debounce-interval = <60>;
  121. wakeup-source;
  122. };
  123. auto {
  124. label = "auto";
  125. gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
  126. linux,code = <BTN_1>;
  127. linux,input-type = <EV_SW>;
  128. debounce-interval = <60>;
  129. wakeup-source;
  130. };
  131. };
  132. };
  133. &nand {
  134. status = "okay";
  135. cs@0 {
  136. reg = <0>;
  137. compatible = "qcom,nandcs";
  138. nand-ecc-strength = <4>;
  139. nand-bus-width = <8>;
  140. nand-ecc-step-size = <512>;
  141. partitions {
  142. compatible = "fixed-partitions";
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. ubi@0 {
  146. label = "ubi";
  147. reg = <0x0000000 0x4000000>;
  148. };
  149. rootfs_1@4000000 {
  150. label = "rootfs_1";
  151. reg = <0x4000000 0x4000000>;
  152. };
  153. };
  154. };
  155. };
  156. &adm_dma {
  157. status = "okay";
  158. };
  159. &mdio0 {
  160. status = "okay";
  161. pinctrl-0 = <&mdio0_pins>;
  162. pinctrl-names = "default";
  163. ethernet-phy@0 {
  164. reg = <0>;
  165. qca,ar8327-initvals = <
  166. 0x00004 0x07600000 /* PAD0_MODE */
  167. 0x00008 0x01000000 /* PAD5_MODE */
  168. 0x0000c 0x00000080 /* PAD6_MODE */
  169. 0x00050 0xcc35cc35 /* LED_CTRL0 */
  170. 0x00054 0xca35ca35 /* LED_CTRL1 */
  171. 0x00058 0xc935c935 /* LED_CTRL2 */
  172. 0x0005c 0x03ffff00 /* LED_CTRL3 */
  173. 0x000e4 0x0006a545 /* MAC_POWER_SEL */
  174. 0x000e0 0xc74164de /* SGMII_CTRL */
  175. 0x0007c 0x0000007e /* PORT0_STATUS */
  176. 0x00094 0x0000007e /* PORT6_STATUS */
  177. >;
  178. };
  179. ethernet-phy@4 {
  180. reg = <4>;
  181. };
  182. };
  183. &gmac1 {
  184. status = "okay";
  185. phy-mode = "rgmii";
  186. qcom,id = <1>;
  187. pinctrl-0 = <&rgmii2_pins>;
  188. pinctrl-names = "default";
  189. nvmem-cells = <&macaddr_ART_6>;
  190. nvmem-cell-names = "mac-address";
  191. fixed-link {
  192. speed = <1000>;
  193. full-duplex;
  194. };
  195. };
  196. &gmac2 {
  197. status = "okay";
  198. phy-mode = "sgmii";
  199. qcom,id = <2>;
  200. nvmem-cells = <&macaddr_ART_0>;
  201. nvmem-cell-names = "mac-address";
  202. fixed-link {
  203. speed = <1000>;
  204. full-duplex;
  205. };
  206. };
  207. &gsbi4_serial {
  208. pinctrl-0 = <&uart0_pins>;
  209. pinctrl-names = "default";
  210. };
  211. &gsbi5 {
  212. status = "okay";
  213. qcom,mode = <GSBI_PROT_SPI>;
  214. spi@1a280000 {
  215. status = "okay";
  216. pinctrl-0 = <&spi_pins>;
  217. pinctrl-names = "default";
  218. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  219. flash@0 {
  220. compatible = "jedec,spi-nor";
  221. spi-max-frequency = <50000000>;
  222. reg = <0>;
  223. partitions {
  224. compatible = "fixed-partitions";
  225. #address-cells = <1>;
  226. #size-cells = <1>;
  227. SBL1@0 {
  228. label = "SBL1";
  229. reg = <0x0 0x10000>;
  230. read-only;
  231. };
  232. MIBIB@10000 {
  233. label = "MIBIB";
  234. reg = <0x10000 0x20000>;
  235. read-only;
  236. };
  237. SBL2@30000 {
  238. label = "SBL2";
  239. reg = <0x30000 0x30000>;
  240. read-only;
  241. };
  242. SBL3@60000 {
  243. label = "SBL3";
  244. reg = <0x60000 0x30000>;
  245. read-only;
  246. };
  247. DDRCONFIG@90000 {
  248. label = "DDRCONFIG";
  249. reg = <0x90000 0x10000>;
  250. read-only;
  251. };
  252. SSD@a0000 {
  253. label = "SSD";
  254. reg = <0xa0000 0x10000>;
  255. read-only;
  256. };
  257. TZ@b0000 {
  258. label = "TZ";
  259. reg = <0xb0000 0x30000>;
  260. read-only;
  261. };
  262. RPM@e0000 {
  263. label = "RPM";
  264. reg = <0xe0000 0x20000>;
  265. read-only;
  266. };
  267. APPSBL@100000 {
  268. label = "APPSBL";
  269. reg = <0x100000 0x70000>;
  270. read-only;
  271. };
  272. APPSBLENV@170000 {
  273. label = "APPSBLENV";
  274. reg = <0x170000 0x10000>;
  275. read-only;
  276. };
  277. ART@180000 {
  278. label = "ART";
  279. reg = <0x180000 0x40000>;
  280. read-only;
  281. compatible = "nvmem-cells";
  282. #address-cells = <1>;
  283. #size-cells = <1>;
  284. macaddr_ART_0: macaddr@0 {
  285. reg = <0x0 0x6>;
  286. };
  287. macaddr_ART_6: macaddr@6 {
  288. reg = <0x6 0x6>;
  289. };
  290. macaddr_ART_18: macaddr@18 {
  291. reg = <0x18 0x6>;
  292. };
  293. macaddr_ART_1e: macaddr@1e {
  294. reg = <0x1e 0x6>;
  295. };
  296. precal_ART_1000: precal@1000 {
  297. reg = <0x1000 0x2f20>;
  298. };
  299. precal_ART_5000: precal@5000 {
  300. reg = <0x5000 0x2f20>;
  301. };
  302. };
  303. BOOTCONFIG@1c0000 {
  304. label = "BOOTCONFIG";
  305. reg = <0x1c0000 0x10000>;
  306. read-only;
  307. };
  308. APPSBL_1@1d0000 {
  309. label = "APPSBL_1";
  310. reg = <0x1d0000 0x70000>;
  311. read-only;
  312. };
  313. };
  314. };
  315. };
  316. };
  317. &hs_phy_0 {
  318. status = "okay";
  319. };
  320. &ss_phy_0 {
  321. status = "okay";
  322. };
  323. &usb3_0 {
  324. status = "okay";
  325. pinctrl-0 = <&usb_pwr_en_pins>;
  326. pinctrl-names = "default";
  327. };
  328. &hs_phy_1 {
  329. status = "okay";
  330. };
  331. &ss_phy_1 {
  332. status = "okay";
  333. };
  334. &usb3_1 {
  335. status = "okay";
  336. };
  337. &dwc3_0 {
  338. #address-cells = <1>;
  339. #size-cells = <0>;
  340. hub_port0: port@1 {
  341. reg = <1>;
  342. #trigger-source-cells = <0>;
  343. };
  344. };
  345. &dwc3_1 {
  346. #address-cells = <1>;
  347. #size-cells = <0>;
  348. hub_port1: port@1 {
  349. reg = <1>;
  350. #trigger-source-cells = <0>;
  351. };
  352. };
  353. &pcie0 {
  354. status = "okay";
  355. bridge@0,0 {
  356. reg = <0x00000000 0 0 0 0>;
  357. #address-cells = <3>;
  358. #size-cells = <2>;
  359. ranges;
  360. wifi@1,0 {
  361. compatible = "pci168c,0040";
  362. reg = <0x00010000 0 0 0 0>;
  363. nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
  364. nvmem-cell-names = "mac-address", "pre-calibration";
  365. };
  366. };
  367. };
  368. &pcie1 {
  369. status = "okay";
  370. max-link-speed = <1>;
  371. bridge@0,0 {
  372. reg = <0x00000000 0 0 0 0>;
  373. #address-cells = <3>;
  374. #size-cells = <2>;
  375. ranges;
  376. wifi@1,0 {
  377. compatible = "pci168c,0040";
  378. reg = <0x00010000 0 0 0 0>;
  379. nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
  380. nvmem-cell-names = "mac-address", "pre-calibration";
  381. };
  382. };
  383. };
  384. &qcom_pinmux {
  385. button_pins: button_pins {
  386. mux {
  387. pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
  388. "gpio58", "gpio64", "gpio65";
  389. function = "gpio";
  390. drive-strength = <2>;
  391. bias-pull-up;
  392. };
  393. };
  394. led_pins: led_pins {
  395. mux {
  396. pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
  397. "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
  398. function = "gpio";
  399. drive-strength = <2>;
  400. bias-pull-up;
  401. };
  402. };
  403. uart0_pins: uart0_pins {
  404. mux {
  405. pins = "gpio10", "gpio11";
  406. function = "gsbi4";
  407. drive-strength = <12>;
  408. bias-disable;
  409. };
  410. };
  411. spi_pins: spi_pins {
  412. mux {
  413. pins = "gpio18", "gpio19", "gpio21";
  414. function = "gsbi5";
  415. bias-pull-down;
  416. };
  417. data {
  418. pins = "gpio18", "gpio19";
  419. drive-strength = <10>;
  420. };
  421. cs{
  422. pins = "gpio20";
  423. drive-strength = <10>;
  424. bias-pull-up;
  425. };
  426. clk {
  427. pins = "gpio21";
  428. drive-strength = <12>;
  429. };
  430. };
  431. usb_pwr_en_pins: usb_pwr_en_pins {
  432. mux{
  433. pins = "gpio68";
  434. function = "gpio";
  435. drive-strength = <2>;
  436. bias-pull-up;
  437. output-high;
  438. };
  439. };
  440. };