0112-remoteproc-qcom-Add-PRNG-proxy-clock.patch 4.0 KB

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  1. From 125681433c8e526356947acf572fe8ca8ad32291 Mon Sep 17 00:00:00 2001
  2. From: Gokul Sriram Palanisamy <[email protected]>
  3. Date: Sat, 30 Jan 2021 10:50:05 +0530
  4. Subject: [PATCH] remoteproc: qcom: Add PRNG proxy clock
  5. PRNG clock is needed by the secure PIL, support for the same
  6. is added in subsequent patches.
  7. Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
  8. Signed-off-by: Sricharan R <[email protected]>
  9. Signed-off-by: Nikhil Prakash V <[email protected]>
  10. ---
  11. drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++--------
  12. 1 file changed, 47 insertions(+), 18 deletions(-)
  13. --- a/drivers/remoteproc/qcom_q6v5_wcss.c
  14. +++ b/drivers/remoteproc/qcom_q6v5_wcss.c
  15. @@ -91,19 +91,6 @@ enum {
  16. WCSS_QCS404,
  17. };
  18. -struct wcss_data {
  19. - const char *firmware_name;
  20. - unsigned int crash_reason_smem;
  21. - u32 version;
  22. - bool aon_reset_required;
  23. - bool wcss_q6_reset_required;
  24. - const char *ssr_name;
  25. - const char *sysmon_name;
  26. - int ssctl_id;
  27. - const struct rproc_ops *ops;
  28. - bool requires_force_stop;
  29. -};
  30. -
  31. struct q6v5_wcss {
  32. struct device *dev;
  33. @@ -128,6 +115,7 @@ struct q6v5_wcss {
  34. struct clk *qdsp6ss_xo_cbcr;
  35. struct clk *qdsp6ss_core_gfmux;
  36. struct clk *lcc_bcr_sleep;
  37. + struct clk *prng_clk;
  38. struct regulator *cx_supply;
  39. struct qcom_sysmon *sysmon;
  40. @@ -151,6 +139,21 @@ struct q6v5_wcss {
  41. struct qcom_rproc_ssr ssr_subdev;
  42. };
  43. +struct wcss_data {
  44. + int (*init_clock)(struct q6v5_wcss *wcss);
  45. + int (*init_regulator)(struct q6v5_wcss *wcss);
  46. + const char *firmware_name;
  47. + unsigned int crash_reason_smem;
  48. + u32 version;
  49. + bool aon_reset_required;
  50. + bool wcss_q6_reset_required;
  51. + const char *ssr_name;
  52. + const char *sysmon_name;
  53. + int ssctl_id;
  54. + const struct rproc_ops *ops;
  55. + bool requires_force_stop;
  56. +};
  57. +
  58. static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
  59. {
  60. int ret;
  61. @@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc
  62. struct q6v5_wcss *wcss = rproc->priv;
  63. int ret;
  64. + ret = clk_prepare_enable(wcss->prng_clk);
  65. + if (ret) {
  66. + dev_err(wcss->dev, "prng clock enable failed\n");
  67. + return ret;
  68. + }
  69. +
  70. qcom_q6v5_prepare(&wcss->q6v5);
  71. /* Release Q6 and WCSS reset */
  72. @@ -733,6 +742,7 @@ static int q6v5_wcss_stop(struct rproc *
  73. return ret;
  74. }
  75. + clk_disable_unprepare(wcss->prng_clk);
  76. qcom_q6v5_unprepare(&wcss->q6v5);
  77. return 0;
  78. @@ -900,7 +910,21 @@ static int q6v5_alloc_memory_region(stru
  79. return 0;
  80. }
  81. -static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
  82. +static int ipq8074_init_clock(struct q6v5_wcss *wcss)
  83. +{
  84. + int ret;
  85. +
  86. + wcss->prng_clk = devm_clk_get(wcss->dev, "prng");
  87. + if (IS_ERR(wcss->prng_clk)) {
  88. + ret = PTR_ERR(wcss->prng_clk);
  89. + if (ret != -EPROBE_DEFER)
  90. + dev_err(wcss->dev, "Failed to get prng clock\n");
  91. + return ret;
  92. + }
  93. + return 0;
  94. +}
  95. +
  96. +static int qcs404_init_clock(struct q6v5_wcss *wcss)
  97. {
  98. int ret;
  99. @@ -990,7 +1014,7 @@ static int q6v5_wcss_init_clock(struct q
  100. return 0;
  101. }
  102. -static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss)
  103. +static int qcs404_init_regulator(struct q6v5_wcss *wcss)
  104. {
  105. wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
  106. if (IS_ERR(wcss->cx_supply))
  107. @@ -1034,12 +1058,14 @@ static int q6v5_wcss_probe(struct platfo
  108. if (ret)
  109. goto free_rproc;
  110. - if (wcss->version == WCSS_QCS404) {
  111. - ret = q6v5_wcss_init_clock(wcss);
  112. + if (desc->init_clock) {
  113. + ret = desc->init_clock(wcss);
  114. if (ret)
  115. goto free_rproc;
  116. + }
  117. - ret = q6v5_wcss_init_regulator(wcss);
  118. + if (desc->init_regulator) {
  119. + ret = desc->init_regulator(wcss);
  120. if (ret)
  121. goto free_rproc;
  122. }
  123. @@ -1087,6 +1113,7 @@ static int q6v5_wcss_remove(struct platf
  124. }
  125. static const struct wcss_data wcss_ipq8074_res_init = {
  126. + .init_clock = ipq8074_init_clock,
  127. .firmware_name = "IPQ8074/q6_fw.mdt",
  128. .crash_reason_smem = WCSS_CRASH_REASON,
  129. .aon_reset_required = true,
  130. @@ -1096,6 +1123,8 @@ static const struct wcss_data wcss_ipq80
  131. };
  132. static const struct wcss_data wcss_qcs404_res_init = {
  133. + .init_clock = qcs404_init_clock,
  134. + .init_regulator = qcs404_init_regulator,
  135. .crash_reason_smem = WCSS_CRASH_REASON,
  136. .firmware_name = "wcnss.mdt",
  137. .version = WCSS_QCS404,