950-0202-dt-bindings-pci-Add-DT-docs-for-Brcmstb-PCIe-device.patch 3.1 KB

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  1. From 417e4745f7470ca8b9809056485eb7a81305019b Mon Sep 17 00:00:00 2001
  2. From: Jim Quinlan <[email protected]>
  3. Date: Mon, 15 Jan 2018 18:28:39 -0500
  4. Subject: [PATCH] dt-bindings: pci: Add DT docs for Brcmstb PCIe device
  5. The DT bindings description of the Brcmstb PCIe device is described. This
  6. node can be used by almost all Broadcom settop box chips, using
  7. ARM, ARM64, or MIPS CPU architectures.
  8. Signed-off-by: Jim Quinlan <[email protected]>
  9. ---
  10. .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 +++++++++++++++++++
  11. 1 file changed, 59 insertions(+)
  12. create mode 100644 Documentation/devicetree/bindings/pci/brcmstb-pcie.txt
  13. --- /dev/null
  14. +++ b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt
  15. @@ -0,0 +1,59 @@
  16. +Brcmstb PCIe Host Controller Device Tree Bindings
  17. +
  18. +Required Properties:
  19. +- compatible
  20. + "brcm,bcm7425-pcie" -- for 7425 family MIPS-based SOCs.
  21. + "brcm,bcm7435-pcie" -- for 7435 family MIPS-based SOCs.
  22. + "brcm,bcm7445-pcie" -- for 7445 and later ARM based SOCs (not including
  23. + the 7278).
  24. + "brcm,bcm7278-pcie" -- for 7278 family ARM-based SOCs.
  25. +
  26. +- reg -- the register start address and length for the PCIe reg block.
  27. +- interrupts -- two interrupts are specified; the first interrupt is for
  28. + the PCI host controller and the second is for MSI if the built-in
  29. + MSI controller is to be used.
  30. +- interrupt-names -- names of the interrupts (above): "pcie" and "msi".
  31. +- #address-cells -- set to <3>.
  32. +- #size-cells -- set to <2>.
  33. +- #interrupt-cells: set to <1>.
  34. +- interrupt-map-mask and interrupt-map, standard PCI properties to define the
  35. + mapping of the PCIe interface to interrupt numbers.
  36. +- ranges: ranges for the PCI memory and I/O regions.
  37. +- linux,pci-domain -- should be unique per host controller.
  38. +
  39. +Optional Properties:
  40. +- clocks -- phandle of pcie clock.
  41. +- clock-names -- set to "sw_pcie" if clocks is used.
  42. +- dma-ranges -- Specifies the inbound memory mapping regions when
  43. + an "identity map" is not possible.
  44. +- msi-controller -- this property is typically specified to have the
  45. + PCIe controller use its internal MSI controller.
  46. +- msi-parent -- set to use an external MSI interrupt controller.
  47. +- brcm,enable-ssc -- (boolean) indicates usage of spread-spectrum clocking.
  48. +- max-link-speed -- (integer) indicates desired generation of link:
  49. + 1 => 2.5 Gbps (gen1), 2 => 5.0 Gbps (gen2), 3 => 8.0 Gbps (gen3).
  50. +
  51. +Example Node:
  52. +
  53. +pcie0: pcie@f0460000 {
  54. + reg = <0x0 0xf0460000 0x0 0x9310>;
  55. + interrupts = <0x0 0x0 0x4>;
  56. + compatible = "brcm,bcm7445-pcie";
  57. + #address-cells = <3>;
  58. + #size-cells = <2>;
  59. + ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000
  60. + 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>;
  61. + #interrupt-cells = <1>;
  62. + interrupt-map-mask = <0 0 0 7>;
  63. + interrupt-map = <0 0 0 1 &intc 0 47 3
  64. + 0 0 0 2 &intc 0 48 3
  65. + 0 0 0 3 &intc 0 49 3
  66. + 0 0 0 4 &intc 0 50 3>;
  67. + clocks = <&sw_pcie0>;
  68. + clock-names = "sw_pcie";
  69. + msi-parent = <&pcie0>; /* use PCIe's internal MSI controller */
  70. + msi-controller; /* use PCIe's internal MSI controller */
  71. + brcm,ssc;
  72. + max-link-speed = <1>;
  73. + linux,pci-domain = <0>;
  74. + };