735-v5.14-14-net-dsa-qca8k-add-support-for-switch-rev.patch 3.3 KB

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  1. From 95ffeaf18b3bb90eeef52cbf7d79ccc9d0345ff5 Mon Sep 17 00:00:00 2001
  2. From: Ansuel Smith <[email protected]>
  3. Date: Fri, 14 May 2021 23:00:04 +0200
  4. Subject: [PATCH] net: dsa: qca8k: add support for switch rev
  5. qca8k internal phy driver require some special debug value to be set
  6. based on the switch revision. Rework the switch id read function to
  7. also read the chip revision.
  8. Signed-off-by: Ansuel Smith <[email protected]>
  9. Reviewed-by: Florian Fainelli <[email protected]>
  10. Signed-off-by: David S. Miller <[email protected]>
  11. ---
  12. drivers/net/dsa/qca8k.c | 53 ++++++++++++++++++++++++++---------------
  13. drivers/net/dsa/qca8k.h | 7 ++++--
  14. 2 files changed, 39 insertions(+), 21 deletions(-)
  15. --- a/drivers/net/dsa/qca8k.c
  16. +++ b/drivers/net/dsa/qca8k.c
  17. @@ -1588,12 +1588,40 @@ static const struct dsa_switch_ops qca8k
  18. .phylink_mac_link_up = qca8k_phylink_mac_link_up,
  19. };
  20. +static int qca8k_read_switch_id(struct qca8k_priv *priv)
  21. +{
  22. + const struct qca8k_match_data *data;
  23. + u32 val;
  24. + u8 id;
  25. +
  26. + /* get the switches ID from the compatible */
  27. + data = of_device_get_match_data(priv->dev);
  28. + if (!data)
  29. + return -ENODEV;
  30. +
  31. + val = qca8k_read(priv, QCA8K_REG_MASK_CTRL);
  32. + if (val < 0)
  33. + return -ENODEV;
  34. +
  35. + id = QCA8K_MASK_CTRL_DEVICE_ID(val & QCA8K_MASK_CTRL_DEVICE_ID_MASK);
  36. + if (id != data->id) {
  37. + dev_err(priv->dev, "Switch id detected %x but expected %x", id, data->id);
  38. + return -ENODEV;
  39. + }
  40. +
  41. + priv->switch_id = id;
  42. +
  43. + /* Save revision to communicate to the internal PHY driver */
  44. + priv->switch_revision = (val & QCA8K_MASK_CTRL_REV_ID_MASK);
  45. +
  46. + return 0;
  47. +}
  48. +
  49. static int
  50. qca8k_sw_probe(struct mdio_device *mdiodev)
  51. {
  52. - const struct qca8k_match_data *data;
  53. struct qca8k_priv *priv;
  54. - u32 id;
  55. + int ret;
  56. /* allocate the private data struct so that we can probe the switches
  57. * ID register
  58. @@ -1619,24 +1647,11 @@ qca8k_sw_probe(struct mdio_device *mdiod
  59. gpiod_set_value_cansleep(priv->reset_gpio, 0);
  60. }
  61. - /* get the switches ID from the compatible */
  62. - data = of_device_get_match_data(&mdiodev->dev);
  63. - if (!data)
  64. - return -ENODEV;
  65. + /* Check the detected switch id */
  66. + ret = qca8k_read_switch_id(priv);
  67. + if (ret)
  68. + return ret;
  69. - /* read the switches ID register */
  70. - id = qca8k_read(priv, QCA8K_REG_MASK_CTRL);
  71. - if (id < 0)
  72. - return id;
  73. -
  74. - id >>= QCA8K_MASK_CTRL_ID_S;
  75. - id &= QCA8K_MASK_CTRL_ID_M;
  76. - if (id != data->id) {
  77. - dev_err(&mdiodev->dev, "Switch id detected %x but expected %x", id, data->id);
  78. - return -ENODEV;
  79. - }
  80. -
  81. - priv->switch_id = id;
  82. priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL);
  83. if (!priv->ds)
  84. return -ENOMEM;
  85. --- a/drivers/net/dsa/qca8k.h
  86. +++ b/drivers/net/dsa/qca8k.h
  87. @@ -30,8 +30,10 @@
  88. /* Global control registers */
  89. #define QCA8K_REG_MASK_CTRL 0x000
  90. -#define QCA8K_MASK_CTRL_ID_M 0xff
  91. -#define QCA8K_MASK_CTRL_ID_S 8
  92. +#define QCA8K_MASK_CTRL_REV_ID_MASK GENMASK(7, 0)
  93. +#define QCA8K_MASK_CTRL_REV_ID(x) ((x) >> 0)
  94. +#define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8)
  95. +#define QCA8K_MASK_CTRL_DEVICE_ID(x) ((x) >> 8)
  96. #define QCA8K_REG_PORT0_PAD_CTRL 0x004
  97. #define QCA8K_REG_PORT5_PAD_CTRL 0x008
  98. #define QCA8K_REG_PORT6_PAD_CTRL 0x00c
  99. @@ -251,6 +253,7 @@ struct qca8k_match_data {
  100. struct qca8k_priv {
  101. u8 switch_id;
  102. + u8 switch_revision;
  103. struct regmap *regmap;
  104. struct mii_bus *bus;
  105. struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS];