qcom-ipq8064-wxr-2533dhp.dts 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq8064-v2.0.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. model = "Buffalo WXR-2533DHP";
  6. compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
  7. memory@42000000 {
  8. reg = <0x42000000 0x1e000000>;
  9. device_type = "memory";
  10. };
  11. aliases {
  12. led-boot = &power;
  13. led-failsafe = &diag;
  14. led-running = &power;
  15. led-upgrade = &power;
  16. };
  17. chosen {
  18. /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
  19. bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
  20. };
  21. leds {
  22. compatible = "gpio-leds";
  23. pinctrl-0 = <&led_pins>;
  24. pinctrl-names = "default";
  25. usb {
  26. label = "green:usb";
  27. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  28. linux,default-trigger = "usbport";
  29. trigger-sources = <&hub_port0 &hub_port1>;
  30. };
  31. guestport {
  32. label = "green:guestport";
  33. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  34. };
  35. diag: diag {
  36. label = "orange:diag";
  37. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  38. };
  39. internet_orange {
  40. label = "orange:internet";
  41. gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
  42. };
  43. internet_white {
  44. label = "white:internet";
  45. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  46. };
  47. wireless_orange {
  48. label = "orange:wireless";
  49. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  50. };
  51. wireless_white {
  52. label = "white:wireless";
  53. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  54. };
  55. router_orange {
  56. label = "orange:router";
  57. gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
  58. };
  59. router_white {
  60. label = "white:router";
  61. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  62. };
  63. power: power {
  64. label = "white:power";
  65. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  66. };
  67. };
  68. keys {
  69. compatible = "gpio-keys";
  70. pinctrl-0 = <&button_pins>;
  71. pinctrl-names = "default";
  72. power {
  73. label = "power";
  74. gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
  75. linux,code = <KEY_POWER>;
  76. debounce-interval = <60>;
  77. wakeup-source;
  78. };
  79. reset {
  80. label = "reset";
  81. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  82. linux,code = <KEY_RESTART>;
  83. debounce-interval = <60>;
  84. wakeup-source;
  85. };
  86. wps {
  87. label = "wps";
  88. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  89. linux,code = <KEY_WPS_BUTTON>;
  90. debounce-interval = <60>;
  91. wakeup-source;
  92. };
  93. eject {
  94. label = "eject";
  95. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  96. linux,code = <KEY_EJECTCD>;
  97. debounce-interval = <60>;
  98. wakeup-source;
  99. };
  100. guest {
  101. label = "guest";
  102. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  103. linux,code = <BTN_0>;
  104. debounce-interval = <60>;
  105. wakeup-source;
  106. };
  107. ap {
  108. label = "ap";
  109. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
  110. linux,code = <BTN_1>;
  111. linux,input-type = <EV_SW>;
  112. debounce-interval = <60>;
  113. wakeup-source;
  114. };
  115. router {
  116. label = "router";
  117. gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  118. linux,code = <BTN_1>;
  119. linux,input-type = <EV_SW>;
  120. debounce-interval = <60>;
  121. wakeup-source;
  122. };
  123. auto {
  124. label = "auto";
  125. gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
  126. linux,code = <BTN_1>;
  127. linux,input-type = <EV_SW>;
  128. debounce-interval = <60>;
  129. wakeup-source;
  130. };
  131. };
  132. };
  133. &nand_controller {
  134. status = "okay";
  135. pinctrl-0 = <&nand_pins>;
  136. pinctrl-names = "default";
  137. cs@0 {
  138. reg = <0>;
  139. compatible = "qcom,nandcs";
  140. nand-ecc-strength = <4>;
  141. nand-bus-width = <8>;
  142. nand-ecc-step-size = <512>;
  143. partitions {
  144. compatible = "fixed-partitions";
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. ubi@0 {
  148. label = "ubi";
  149. reg = <0x0000000 0x4000000>;
  150. };
  151. rootfs_1@4000000 {
  152. label = "rootfs_1";
  153. reg = <0x4000000 0x4000000>;
  154. };
  155. };
  156. };
  157. };
  158. &adm_dma {
  159. status = "okay";
  160. };
  161. &mdio0 {
  162. status = "okay";
  163. pinctrl-0 = <&mdio0_pins>;
  164. pinctrl-names = "default";
  165. ethernet-phy@0 {
  166. reg = <0>;
  167. qca,ar8327-initvals = <
  168. 0x00004 0x07600000 /* PAD0_MODE */
  169. 0x00008 0x01000000 /* PAD5_MODE */
  170. 0x0000c 0x00000080 /* PAD6_MODE */
  171. 0x00050 0xcc35cc35 /* LED_CTRL0 */
  172. 0x00054 0xca35ca35 /* LED_CTRL1 */
  173. 0x00058 0xc935c935 /* LED_CTRL2 */
  174. 0x0005c 0x03ffff00 /* LED_CTRL3 */
  175. 0x000e4 0x0006a545 /* MAC_POWER_SEL */
  176. 0x000e0 0xc74164de /* SGMII_CTRL */
  177. 0x0007c 0x0000007e /* PORT0_STATUS */
  178. 0x00094 0x0000007e /* PORT6_STATUS */
  179. >;
  180. };
  181. ethernet-phy@4 {
  182. reg = <4>;
  183. };
  184. };
  185. &gmac1 {
  186. status = "okay";
  187. phy-mode = "rgmii";
  188. qcom,id = <1>;
  189. pinctrl-0 = <&rgmii2_pins>;
  190. pinctrl-names = "default";
  191. nvmem-cells = <&macaddr_ART_6>;
  192. nvmem-cell-names = "mac-address";
  193. fixed-link {
  194. speed = <1000>;
  195. full-duplex;
  196. };
  197. };
  198. &gmac2 {
  199. status = "okay";
  200. phy-mode = "sgmii";
  201. qcom,id = <2>;
  202. nvmem-cells = <&macaddr_ART_0>;
  203. nvmem-cell-names = "mac-address";
  204. fixed-link {
  205. speed = <1000>;
  206. full-duplex;
  207. };
  208. };
  209. &gsbi4_serial {
  210. pinctrl-0 = <&uart0_pins>;
  211. pinctrl-names = "default";
  212. };
  213. &gsbi5 {
  214. status = "okay";
  215. qcom,mode = <GSBI_PROT_SPI>;
  216. spi@1a280000 {
  217. status = "okay";
  218. pinctrl-0 = <&spi_pins>;
  219. pinctrl-names = "default";
  220. cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
  221. flash@0 {
  222. compatible = "jedec,spi-nor";
  223. spi-max-frequency = <50000000>;
  224. reg = <0>;
  225. partitions {
  226. compatible = "fixed-partitions";
  227. #address-cells = <1>;
  228. #size-cells = <1>;
  229. SBL1@0 {
  230. label = "SBL1";
  231. reg = <0x0 0x10000>;
  232. read-only;
  233. };
  234. MIBIB@10000 {
  235. label = "MIBIB";
  236. reg = <0x10000 0x20000>;
  237. read-only;
  238. };
  239. SBL2@30000 {
  240. label = "SBL2";
  241. reg = <0x30000 0x30000>;
  242. read-only;
  243. };
  244. SBL3@60000 {
  245. label = "SBL3";
  246. reg = <0x60000 0x30000>;
  247. read-only;
  248. };
  249. DDRCONFIG@90000 {
  250. label = "DDRCONFIG";
  251. reg = <0x90000 0x10000>;
  252. read-only;
  253. };
  254. SSD@a0000 {
  255. label = "SSD";
  256. reg = <0xa0000 0x10000>;
  257. read-only;
  258. };
  259. TZ@b0000 {
  260. label = "TZ";
  261. reg = <0xb0000 0x30000>;
  262. read-only;
  263. };
  264. RPM@e0000 {
  265. label = "RPM";
  266. reg = <0xe0000 0x20000>;
  267. read-only;
  268. };
  269. APPSBL@100000 {
  270. label = "APPSBL";
  271. reg = <0x100000 0x70000>;
  272. read-only;
  273. };
  274. APPSBLENV@170000 {
  275. label = "APPSBLENV";
  276. reg = <0x170000 0x10000>;
  277. read-only;
  278. };
  279. ART: ART@180000 {
  280. label = "ART";
  281. reg = <0x180000 0x40000>;
  282. read-only;
  283. };
  284. BOOTCONFIG@1c0000 {
  285. label = "BOOTCONFIG";
  286. reg = <0x1c0000 0x10000>;
  287. read-only;
  288. };
  289. APPSBL_1@1d0000 {
  290. label = "APPSBL_1";
  291. reg = <0x1d0000 0x70000>;
  292. read-only;
  293. };
  294. };
  295. };
  296. };
  297. };
  298. &usb3_0 {
  299. status = "okay";
  300. pinctrl-0 = <&usb_pwr_en_pins>;
  301. pinctrl-names = "default";
  302. };
  303. &usb3_1 {
  304. status = "okay";
  305. };
  306. &dwc3_0 {
  307. #address-cells = <1>;
  308. #size-cells = <0>;
  309. hub_port0: port@1 {
  310. reg = <1>;
  311. #trigger-source-cells = <0>;
  312. };
  313. };
  314. &dwc3_1 {
  315. #address-cells = <1>;
  316. #size-cells = <0>;
  317. hub_port1: port@1 {
  318. reg = <1>;
  319. #trigger-source-cells = <0>;
  320. };
  321. };
  322. &pcie0 {
  323. status = "okay";
  324. bridge@0,0 {
  325. reg = <0x00000000 0 0 0 0>;
  326. #address-cells = <3>;
  327. #size-cells = <2>;
  328. ranges;
  329. wifi@1,0 {
  330. compatible = "pci168c,0040";
  331. reg = <0x00010000 0 0 0 0>;
  332. nvmem-cells = <&macaddr_ART_1e>;
  333. nvmem-cell-names = "mac-address";
  334. };
  335. };
  336. };
  337. &pcie1 {
  338. status = "okay";
  339. max-link-speed = <1>;
  340. bridge@0,0 {
  341. reg = <0x00000000 0 0 0 0>;
  342. #address-cells = <3>;
  343. #size-cells = <2>;
  344. ranges;
  345. wifi@1,0 {
  346. compatible = "pci168c,0040";
  347. reg = <0x00010000 0 0 0 0>;
  348. nvmem-cells = <&macaddr_ART_18>;
  349. nvmem-cell-names = "mac-address";
  350. };
  351. };
  352. };
  353. &qcom_pinmux {
  354. button_pins: button_pins {
  355. mux {
  356. pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
  357. "gpio58", "gpio64", "gpio65";
  358. function = "gpio";
  359. drive-strength = <2>;
  360. bias-pull-up;
  361. };
  362. };
  363. led_pins: led_pins {
  364. mux {
  365. pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
  366. "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
  367. function = "gpio";
  368. drive-strength = <2>;
  369. bias-pull-up;
  370. };
  371. };
  372. uart0_pins: uart0_pins {
  373. mux {
  374. pins = "gpio10", "gpio11";
  375. function = "gsbi4";
  376. drive-strength = <12>;
  377. bias-disable;
  378. };
  379. };
  380. spi_pins: spi_pins {
  381. mux {
  382. pins = "gpio18", "gpio19", "gpio21";
  383. function = "gsbi5";
  384. bias-pull-down;
  385. };
  386. data {
  387. pins = "gpio18", "gpio19";
  388. drive-strength = <10>;
  389. };
  390. cs{
  391. pins = "gpio20";
  392. drive-strength = <10>;
  393. bias-pull-up;
  394. };
  395. clk {
  396. pins = "gpio21";
  397. drive-strength = <12>;
  398. };
  399. };
  400. usb_pwr_en_pins: usb_pwr_en_pins {
  401. mux{
  402. pins = "gpio68";
  403. function = "gpio";
  404. drive-strength = <2>;
  405. bias-pull-up;
  406. output-high;
  407. };
  408. };
  409. };
  410. &ART {
  411. compatible = "nvmem-cells";
  412. #address-cells = <1>;
  413. #size-cells = <1>;
  414. macaddr_ART_0: macaddr@0 {
  415. reg = <0x0 0x6>;
  416. };
  417. macaddr_ART_6: macaddr@6 {
  418. reg = <0x6 0x6>;
  419. };
  420. macaddr_ART_18: macaddr@18 {
  421. reg = <0x18 0x6>;
  422. };
  423. macaddr_ART_1e: macaddr@1e {
  424. reg = <0x1e 0x6>;
  425. };
  426. };