001-v6.2-arm64-dts-mediatek-mt7986-add-support-for-RX-Wireles.patch 2.7 KB

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  1. From 2c4daed9580164522859fa100128be408cc69be2 Mon Sep 17 00:00:00 2001
  2. From: Lorenzo Bianconi <[email protected]>
  3. Date: Sat, 5 Nov 2022 23:36:16 +0100
  4. Subject: [PATCH 01/19] arm64: dts: mediatek: mt7986: add support for RX
  5. Wireless Ethernet Dispatch
  6. Similar to TX Wireless Ethernet Dispatch, introduce RX Wireless Ethernet
  7. Dispatch to offload traffic received by the wlan interface to lan/wan
  8. one.
  9. Co-developed-by: Sujuan Chen <[email protected]>
  10. Signed-off-by: Sujuan Chen <[email protected]>
  11. Signed-off-by: Lorenzo Bianconi <[email protected]>
  12. Signed-off-by: David S. Miller <[email protected]>
  13. ---
  14. arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 65 +++++++++++++++++++++++
  15. 1 file changed, 65 insertions(+)
  16. --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
  17. +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
  18. @@ -76,6 +76,47 @@
  19. no-map;
  20. reg = <0 0x4fc00000 0 0x00100000>;
  21. };
  22. +
  23. + wo_emi0: wo-emi@4fd00000 {
  24. + reg = <0 0x4fd00000 0 0x40000>;
  25. + no-map;
  26. + };
  27. +
  28. + wo_emi1: wo-emi@4fd40000 {
  29. + reg = <0 0x4fd40000 0 0x40000>;
  30. + no-map;
  31. + };
  32. +
  33. + wo_ilm0: wo-ilm@151e0000 {
  34. + reg = <0 0x151e0000 0 0x8000>;
  35. + no-map;
  36. + };
  37. +
  38. + wo_ilm1: wo-ilm@151f0000 {
  39. + reg = <0 0x151f0000 0 0x8000>;
  40. + no-map;
  41. + };
  42. +
  43. + wo_data: wo-data@4fd80000 {
  44. + reg = <0 0x4fd80000 0 0x240000>;
  45. + no-map;
  46. + };
  47. +
  48. + wo_dlm0: wo-dlm@151e8000 {
  49. + reg = <0 0x151e8000 0 0x2000>;
  50. + no-map;
  51. + };
  52. +
  53. + wo_dlm1: wo-dlm@151f8000 {
  54. + reg = <0 0x151f8000 0 0x2000>;
  55. + no-map;
  56. + };
  57. +
  58. + wo_boot: wo-boot@15194000 {
  59. + reg = <0 0x15194000 0 0x1000>;
  60. + no-map;
  61. + };
  62. +
  63. };
  64. timer {
  65. @@ -239,6 +280,11 @@
  66. reg = <0 0x15010000 0 0x1000>;
  67. interrupt-parent = <&gic>;
  68. interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
  69. + memory-region = <&wo_emi0>, <&wo_ilm0>, <&wo_dlm0>,
  70. + <&wo_data>, <&wo_boot>;
  71. + memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
  72. + "wo-data", "wo-boot";
  73. + mediatek,wo-ccif = <&wo_ccif0>;
  74. };
  75. wed1: wed@15011000 {
  76. @@ -247,6 +293,25 @@
  77. reg = <0 0x15011000 0 0x1000>;
  78. interrupt-parent = <&gic>;
  79. interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
  80. + memory-region = <&wo_emi1>, <&wo_ilm1>, <&wo_dlm1>,
  81. + <&wo_data>, <&wo_boot>;
  82. + memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
  83. + "wo-data", "wo-boot";
  84. + mediatek,wo-ccif = <&wo_ccif1>;
  85. + };
  86. +
  87. + wo_ccif0: syscon@151a5000 {
  88. + compatible = "mediatek,mt7986-wo-ccif", "syscon";
  89. + reg = <0 0x151a5000 0 0x1000>;
  90. + interrupt-parent = <&gic>;
  91. + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
  92. + };
  93. +
  94. + wo_ccif1: syscon@151ad000 {
  95. + compatible = "mediatek,mt7986-wo-ccif", "syscon";
  96. + reg = <0 0x151ad000 0 0x1000>;
  97. + interrupt-parent = <&gic>;
  98. + interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
  99. };
  100. eth: ethernet@15100000 {