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- From d16202eb38585adbc16e32d11188dbc2127015de Mon Sep 17 00:00:00 2001
- From: Maso Huang <[email protected]>
- Date: Thu, 17 Aug 2023 18:13:38 +0800
- Subject: [PATCH 6/9] ASoC: dt-bindings: mediatek,mt7986-afe: add audio afe
- document
- Add mt7986 audio afe document.
- Signed-off-by: Maso Huang <[email protected]>
- Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- Signed-off-by: Mark Brown <[email protected]>
- ---
- .../bindings/sound/mediatek,mt7986-afe.yaml | 160 ++++++++++++++++++
- 1 file changed, 160 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml
- --- /dev/null
- +++ b/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml
- @@ -0,0 +1,160 @@
- +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
- +%YAML 1.2
- +---
- +$id: http://devicetree.org/schemas/sound/mediatek,mt7986-afe.yaml#
- +$schema: http://devicetree.org/meta-schemas/core.yaml#
- +
- +title: MediaTek AFE PCM controller for MT7986
- +
- +maintainers:
- + - Maso Huang <[email protected]>
- +
- +properties:
- + compatible:
- + oneOf:
- + - const: mediatek,mt7986-afe
- + - items:
- + - enum:
- + - mediatek,mt7981-afe
- + - mediatek,mt7988-afe
- + - const: mediatek,mt7986-afe
- +
- + reg:
- + maxItems: 1
- +
- + interrupts:
- + maxItems: 1
- +
- + clocks:
- + minItems: 5
- + items:
- + - description: audio bus clock
- + - description: audio 26M clock
- + - description: audio intbus clock
- + - description: audio hopping clock
- + - description: audio pll clock
- + - description: mux for pcm_mck
- + - description: audio i2s/pcm mck
- +
- + clock-names:
- + minItems: 5
- + items:
- + - const: bus_ck
- + - const: 26m_ck
- + - const: l_ck
- + - const: aud_ck
- + - const: eg2_ck
- + - const: sel
- + - const: i2s_m
- +
- +required:
- + - compatible
- + - reg
- + - interrupts
- + - clocks
- + - clock-names
- +
- +allOf:
- + - if:
- + properties:
- + compatible:
- + contains:
- + const: mediatek,mt7986-afe
- + then:
- + properties:
- + clocks:
- + items:
- + - description: audio bus clock
- + - description: audio 26M clock
- + - description: audio intbus clock
- + - description: audio hopping clock
- + - description: audio pll clock
- + clock-names:
- + items:
- + - const: bus_ck
- + - const: 26m_ck
- + - const: l_ck
- + - const: aud_ck
- + - const: eg2_ck
- +
- + - if:
- + properties:
- + compatible:
- + contains:
- + const: mediatek,mt7981-afe
- + then:
- + properties:
- + clocks:
- + items:
- + - description: audio bus clock
- + - description: audio 26M clock
- + - description: audio intbus clock
- + - description: audio hopping clock
- + - description: audio pll clock
- + - description: mux for pcm_mck
- + clock-names:
- + items:
- + - const: bus_ck
- + - const: 26m_ck
- + - const: l_ck
- + - const: aud_ck
- + - const: eg2_ck
- + - const: sel
- +
- + - if:
- + properties:
- + compatible:
- + contains:
- + const: mediatek,mt7988-afe
- + then:
- + properties:
- + clocks:
- + items:
- + - description: audio bus clock
- + - description: audio 26M clock
- + - description: audio intbus clock
- + - description: audio hopping clock
- + - description: audio pll clock
- + - description: mux for pcm_mck
- + - description: audio i2s/pcm mck
- + clock-names:
- + items:
- + - const: bus_ck
- + - const: 26m_ck
- + - const: l_ck
- + - const: aud_ck
- + - const: eg2_ck
- + - const: sel
- + - const: i2s_m
- +
- +additionalProperties: false
- +
- +examples:
- + - |
- + #include <dt-bindings/interrupt-controller/arm-gic.h>
- + #include <dt-bindings/interrupt-controller/irq.h>
- + #include <dt-bindings/clock/mt7986-clk.h>
- +
- + afe@11210000 {
- + compatible = "mediatek,mt7986-afe";
- + reg = <0x11210000 0x9000>;
- + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- + clocks = <&infracfg_ao CLK_INFRA_AUD_BUS_CK>,
- + <&infracfg_ao CLK_INFRA_AUD_26M_CK>,
- + <&infracfg_ao CLK_INFRA_AUD_L_CK>,
- + <&infracfg_ao CLK_INFRA_AUD_AUD_CK>,
- + <&infracfg_ao CLK_INFRA_AUD_EG2_CK>;
- + clock-names = "bus_ck",
- + "26m_ck",
- + "l_ck",
- + "aud_ck",
- + "eg2_ck";
- + assigned-clocks = <&topckgen CLK_TOP_A1SYS_SEL>,
- + <&topckgen CLK_TOP_AUD_L_SEL>,
- + <&topckgen CLK_TOP_A_TUNER_SEL>;
- + assigned-clock-parents = <&topckgen CLK_TOP_APLL2_D4>,
- + <&apmixedsys CLK_APMIXED_APLL2>,
- + <&topckgen CLK_TOP_APLL2_D4>;
- + };
- +
- +...
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