100-board_support.patch 3.0 KB

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  1. Index: linux-2.6.23.17/arch/mips/Kconfig
  2. ===================================================================
  3. --- linux-2.6.23.17.orig/arch/mips/Kconfig
  4. +++ linux-2.6.23.17/arch/mips/Kconfig
  5. @@ -15,6 +15,22 @@ choice
  6. prompt "System type"
  7. default SGI_IP22
  8. +config AR7
  9. + bool "Texas Instruments AR7"
  10. + select BOOT_ELF32
  11. + select DMA_NONCOHERENT
  12. + select IRQ_CPU
  13. + select NO_EXCEPT_FILL
  14. + select SWAP_IO_SPACE
  15. + select SYS_HAS_CPU_MIPS32_R1
  16. + select SYS_HAS_EARLY_PRINTK
  17. + select SYS_SUPPORTS_32BIT_KERNEL
  18. + select SYS_SUPPORTS_KGDB
  19. + select SYS_SUPPORTS_LITTLE_ENDIAN
  20. + select SYS_SUPPORTS_BIG_ENDIAN
  21. + select GENERIC_GPIO
  22. + select GENERIC_HARDIRQS_NO__DO_IRQ
  23. +
  24. config MACH_ALCHEMY
  25. bool "Alchemy processor based machines"
  26. Index: linux-2.6.23.17/arch/mips/kernel/traps.c
  27. ===================================================================
  28. --- linux-2.6.23.17.orig/arch/mips/kernel/traps.c
  29. +++ linux-2.6.23.17/arch/mips/kernel/traps.c
  30. @@ -1075,10 +1075,23 @@ void *set_except_vector(int n, void *add
  31. exception_handlers[n] = handler;
  32. if (n == 0 && cpu_has_divec) {
  33. - *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
  34. - (0x03ffffff & (handler >> 2));
  35. - flush_icache_range(ebase + 0x200, ebase + 0x204);
  36. - }
  37. + if ((handler ^ (ebase + 4)) & 0xfc000000) {
  38. + /* lui k0, 0x0000 */
  39. + *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
  40. + /* ori k0, 0x0000 */
  41. + *(u32 *)(ebase + 0x204) =
  42. + 0x375a0000 | (handler & 0xffff);
  43. + /* jr k0 */
  44. + *(u32 *)(ebase + 0x208) = 0x03400008;
  45. + /* nop */
  46. + *(u32 *)(ebase + 0x20C) = 0x00000000;
  47. + flush_icache_range(ebase + 0x200, ebase + 0x210);
  48. + } else {
  49. + *(volatile u32 *)(ebase + 0x200) =
  50. + 0x08000000 | (0x03ffffff & (handler >> 2));
  51. + flush_icache_range(ebase + 0x200, ebase + 0x204);
  52. + }
  53. + }
  54. return (void *)old_handler;
  55. }
  56. Index: linux-2.6.23.17/arch/mips/Makefile
  57. ===================================================================
  58. --- linux-2.6.23.17.orig/arch/mips/Makefile
  59. +++ linux-2.6.23.17/arch/mips/Makefile
  60. @@ -161,6 +161,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
  61. #
  62. #
  63. +# Texas Instruments AR7
  64. +#
  65. +core-$(CONFIG_AR7) += arch/mips/ar7/
  66. +cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
  67. +load-$(CONFIG_AR7) += 0xffffffff94100000
  68. +
  69. +#
  70. # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
  71. #
  72. core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
  73. Index: linux-2.6.23.17/include/asm-mips/page.h
  74. ===================================================================
  75. --- linux-2.6.23.17.orig/include/asm-mips/page.h
  76. +++ linux-2.6.23.17/include/asm-mips/page.h
  77. @@ -184,8 +184,10 @@ typedef struct { unsigned long pgprot; }
  78. #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
  79. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  80. -#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
  81. -#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
  82. +#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
  83. + PHYS_OFFSET)
  84. +#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
  85. + PHYS_OFFSET)
  86. #include <asm-generic/memory_model.h>
  87. #include <asm-generic/page.h>