100-board_support.patch 2.3 KB

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  1. --- a/arch/mips/Kconfig
  2. +++ b/arch/mips/Kconfig
  3. @@ -18,6 +18,24 @@
  4. prompt "System type"
  5. default SGI_IP22
  6. +config AR7
  7. + bool "Texas Instruments AR7"
  8. + select BOOT_ELF32
  9. + select DMA_NONCOHERENT
  10. + select CEVT_R4K
  11. + select CSRC_R4K
  12. + select IRQ_CPU
  13. + select NO_EXCEPT_FILL
  14. + select SWAP_IO_SPACE
  15. + select SYS_HAS_CPU_MIPS32_R1
  16. + select SYS_HAS_EARLY_PRINTK
  17. + select SYS_SUPPORTS_32BIT_KERNEL
  18. + select SYS_SUPPORTS_KGDB
  19. + select SYS_SUPPORTS_LITTLE_ENDIAN
  20. + select SYS_SUPPORTS_BIG_ENDIAN
  21. + select GENERIC_GPIO
  22. + select GENERIC_HARDIRQS_NO__DO_IRQ
  23. +
  24. config MACH_ALCHEMY
  25. bool "Alchemy processor based machines"
  26. --- a/arch/mips/kernel/traps.c
  27. +++ b/arch/mips/kernel/traps.c
  28. @@ -1112,9 +1112,22 @@
  29. exception_handlers[n] = handler;
  30. if (n == 0 && cpu_has_divec) {
  31. - *(u32 *)(ebase + 0x200) = 0x08000000 |
  32. - (0x03ffffff & (handler >> 2));
  33. - flush_icache_range(ebase + 0x200, ebase + 0x204);
  34. + if ((handler ^ (ebase + 4)) & 0xfc000000) {
  35. + /* lui k0, 0x0000 */
  36. + *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
  37. + /* ori k0, 0x0000 */
  38. + *(u32 *)(ebase + 0x204) =
  39. + 0x375a0000 | (handler & 0xffff);
  40. + /* jr k0 */
  41. + *(u32 *)(ebase + 0x208) = 0x03400008;
  42. + /* nop */
  43. + *(u32 *)(ebase + 0x20C) = 0x00000000;
  44. + flush_icache_range(ebase + 0x200, ebase + 0x210);
  45. + } else {
  46. + *(u32 *)(ebase + 0x200) =
  47. + 0x08000000 | (0x03ffffff & (handler >> 2));
  48. + flush_icache_range(ebase + 0x200, ebase + 0x204);
  49. + }
  50. }
  51. return (void *)old_handler;
  52. }
  53. --- a/arch/mips/Makefile
  54. +++ b/arch/mips/Makefile
  55. @@ -167,6 +167,13 @@
  56. #
  57. #
  58. +# Texas Instruments AR7
  59. +#
  60. +core-$(CONFIG_AR7) += arch/mips/ar7/
  61. +cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
  62. +load-$(CONFIG_AR7) += 0xffffffff94100000
  63. +
  64. +#
  65. # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
  66. #
  67. core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
  68. --- a/include/asm-mips/page.h
  69. +++ b/include/asm-mips/page.h
  70. @@ -182,8 +182,10 @@
  71. #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
  72. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  73. -#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
  74. -#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
  75. +#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
  76. + PHYS_OFFSET)
  77. +#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
  78. + PHYS_OFFSET)
  79. #include <asm-generic/memory_model.h>
  80. #include <asm-generic/page.h>