004-gmac_enable_napi.patch 2.8 KB

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  1. --- a/drivers/net/sl351x_gmac.c
  2. +++ b/drivers/net/sl351x_gmac.c
  3. @@ -68,9 +68,11 @@
  4. #include <linux/ip.h>
  5. #endif
  6. +/* Enables NAPI unconditionally */
  7. +#define CONFIG_SL_NAPI 1
  8. +
  9. // #define SL351x_TEST_WORKAROUND
  10. #ifdef CONFIG_SL351x_NAT
  11. -#define CONFIG_SL_NAPI 1
  12. #endif
  13. #define GMAX_TX_INTR_DISABLED 1
  14. #define DO_HW_CHKSUM 1
  15. @@ -124,12 +126,17 @@
  16. *************************************************************/
  17. static int gmac_initialized = 0;
  18. TOE_INFO_T toe_private_data;
  19. -//static int do_again = 0;
  20. +static int do_again = 0;
  21. spinlock_t gmac_fq_lock;
  22. unsigned int FLAG_SWITCH;
  23. static unsigned int next_tick = 3 * HZ;
  24. -static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {{0x00,0x11,0x11,0x87,0x87,0x87}, {0x00,0x22,0x22,0xab,0xab,0xab}};
  25. +static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {
  26. + {0x00,0x11,0x11,0x87,0x87,0x87},
  27. +#if GMAC_NUM != 1
  28. + {0x00,0x22,0x22,0xab,0xab,0xab}
  29. +#endif
  30. +};
  31. #undef CONFIG_SL351x_RXTOE
  32. extern NAT_CFG_T nat_cfg;
  33. @@ -2443,7 +2450,8 @@
  34. toe = (TOE_INFO_T *)&toe_private_data;
  35. // handle NAPI
  36. #ifdef CONFIG_SL_NAPI
  37. -if (storlink_ctl.pauseoff == 1)
  38. + /* XXX: check this, changed from 'storlink_ctl.pauseoff == 1' to if (1) */
  39. +if (1)
  40. {
  41. /* disable GMAC interrupt */
  42. //toe_gmac_disable_interrupt(tp->irq);
  43. @@ -2530,7 +2538,7 @@
  44. {
  45. if (likely(netif_rx_schedule_prep(dev)))
  46. {
  47. - unsigned int data32;
  48. + // unsigned int data32;
  49. // disable GMAC-0 rx interrupt
  50. // class-Q & TOE-Q are implemented in future
  51. //data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
  52. @@ -2563,7 +2571,7 @@
  53. {
  54. if (likely(netif_rx_schedule_prep(dev)))
  55. {
  56. - unsigned int data32;
  57. + // unsigned int data32;
  58. // disable GMAC-0 rx interrupt
  59. // class-Q & TOE-Q are implemented in future
  60. //data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
  61. @@ -4217,7 +4225,7 @@
  62. GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
  63. unsigned int status4;
  64. volatile DMA_RWPTR_T fq_rwptr;
  65. - int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
  66. + // int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
  67. //unsigned long rx_old_bytes;
  68. struct net_device_stats *isPtr = (struct net_device_stats *)&tp->ifStatics;
  69. //unsigned long long rx_time;
  70. @@ -4479,7 +4487,7 @@
  71. if (rwptr.bits.rptr == rwptr.bits.wptr)
  72. {
  73. - unsigned int data32;
  74. + // unsigned int data32;
  75. //printk("%s:---[rwptr.bits.rptr == rwptr.bits.wptr] rx_pkts_num=%d------rwptr.bits.rptr=0x%x------->Default_Q [rwptr.bits.rptr(SW)=0x%x, rwptr.bits.wptr(HW) = 0x%x ]---->Free_Q(SW_HW) = 0x%8x \n",__func__,rx_pkts_num,rwptr.bits.rptr,rwptr.bits.rptr,rwptr.bits.wptr,fq_rwptr.bits32 );
  76. /* Receive descriptor is empty now */