2
0

733-v6.4-24-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758
  1. From 88a0fd5927b7c2c7aecd6dc747d898eb38043d2b Mon Sep 17 00:00:00 2001
  2. From: Felix Fietkau <[email protected]>
  3. Date: Thu, 20 Apr 2023 22:06:42 +0100
  4. Subject: [PATCH 093/250] net: mtk_eth_soc: mediatek: fix ppe flow accounting
  5. for v1 hardware
  6. Older chips (like MT7622) use a different bit in ib2 to enable hardware
  7. counter support. Add macros for both and select the appropriate bit.
  8. Fixes: 3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting")
  9. Signed-off-by: Felix Fietkau <[email protected]>
  10. Signed-off-by: Daniel Golle <[email protected]>
  11. Signed-off-by: David S. Miller <[email protected]>
  12. ---
  13. drivers/net/ethernet/mediatek/mtk_ppe.c | 10 ++++++++--
  14. drivers/net/ethernet/mediatek/mtk_ppe.h | 3 ++-
  15. 2 files changed, 10 insertions(+), 3 deletions(-)
  16. --- a/drivers/net/ethernet/mediatek/mtk_ppe.c
  17. +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
  18. @@ -599,6 +599,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
  19. struct mtk_eth *eth = ppe->eth;
  20. u16 timestamp = mtk_eth_timestamp(eth);
  21. struct mtk_foe_entry *hwe;
  22. + u32 val;
  23. if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
  24. entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2;
  25. @@ -615,8 +616,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
  26. wmb();
  27. hwe->ib1 = entry->ib1;
  28. - if (ppe->accounting)
  29. - *mtk_foe_entry_ib2(eth, hwe) |= MTK_FOE_IB2_MIB_CNT;
  30. + if (ppe->accounting) {
  31. + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
  32. + val = MTK_FOE_IB2_MIB_CNT_V2;
  33. + else
  34. + val = MTK_FOE_IB2_MIB_CNT;
  35. + *mtk_foe_entry_ib2(eth, hwe) |= val;
  36. + }
  37. dma_wmb();
  38. --- a/drivers/net/ethernet/mediatek/mtk_ppe.h
  39. +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
  40. @@ -55,9 +55,10 @@ enum {
  41. #define MTK_FOE_IB2_PSE_QOS BIT(4)
  42. #define MTK_FOE_IB2_DEST_PORT GENMASK(7, 5)
  43. #define MTK_FOE_IB2_MULTICAST BIT(8)
  44. +#define MTK_FOE_IB2_MIB_CNT BIT(10)
  45. #define MTK_FOE_IB2_WDMA_QID2 GENMASK(13, 12)
  46. -#define MTK_FOE_IB2_MIB_CNT BIT(15)
  47. +#define MTK_FOE_IB2_MIB_CNT_V2 BIT(15)
  48. #define MTK_FOE_IB2_WDMA_DEVIDX BIT(16)
  49. #define MTK_FOE_IB2_WDMA_WINFO BIT(17)