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- From a9108b0712bf018dc69020864b21485b71b17dfc Mon Sep 17 00:00:00 2001
- From: Christian Marangi <[email protected]>
- Date: Sun, 30 Jul 2023 09:41:12 +0200
- Subject: [PATCH 3/4] net: dsa: qca8k: move qca8xxx hol fixup to separate
- function
- Move qca8xxx hol fixup to separate function to tidy things up and to
- permit using a more efficent loop in future patch.
- Signed-off-by: Christian Marangi <[email protected]>
- Reviewed-by: Florian Fainelli <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- Signed-off-by: Paolo Abeni <[email protected]>
- ---
- drivers/net/dsa/qca/qca8k-8xxx.c | 78 +++++++++++++++++---------------
- 1 file changed, 42 insertions(+), 36 deletions(-)
- --- a/drivers/net/dsa/qca/qca8k-8xxx.c
- +++ b/drivers/net/dsa/qca/qca8k-8xxx.c
- @@ -1795,6 +1795,46 @@ static int qca8k_connect_tag_protocol(st
- return 0;
- }
-
- +static void qca8k_setup_hol_fixup(struct qca8k_priv *priv, int port)
- +{
- + u32 mask;
- +
- + switch (port) {
- + /* The 2 CPU port and port 5 requires some different
- + * priority than any other ports.
- + */
- + case 0:
- + case 5:
- + case 6:
- + mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) |
- + QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e);
- + break;
- + default:
- + mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) |
- + QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) |
- + QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19);
- + }
- + regmap_write(priv->regmap, QCA8K_REG_PORT_HOL_CTRL0(port), mask);
- +
- + mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) |
- + QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- + QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- + QCA8K_PORT_HOL_CTRL1_WRED_EN;
- + regmap_update_bits(priv->regmap, QCA8K_REG_PORT_HOL_CTRL1(port),
- + QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK |
- + QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- + QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- + QCA8K_PORT_HOL_CTRL1_WRED_EN,
- + mask);
- +}
- +
- static int
- qca8k_setup(struct dsa_switch *ds)
- {
- @@ -1930,42 +1970,8 @@ qca8k_setup(struct dsa_switch *ds)
- * missing settings to improve switch stability under load condition.
- * This problem is limited to qca8337 and other qca8k switch are not affected.
- */
- - if (priv->switch_id == QCA8K_ID_QCA8337) {
- - switch (i) {
- - /* The 2 CPU port and port 5 requires some different
- - * priority than any other ports.
- - */
- - case 0:
- - case 5:
- - case 6:
- - mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) |
- - QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e);
- - break;
- - default:
- - mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) |
- - QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) |
- - QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19);
- - }
- - qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask);
- -
- - mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) |
- - QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- - QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- - QCA8K_PORT_HOL_CTRL1_WRED_EN;
- - qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i),
- - QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK |
- - QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- - QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- - QCA8K_PORT_HOL_CTRL1_WRED_EN,
- - mask);
- - }
- + if (priv->switch_id == QCA8K_ID_QCA8337)
- + qca8k_setup_hol_fixup(priv, i);
- }
-
- /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */
|
