qcom-ipq8064-ap161.dts 4.6 KB

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  1. #include "qcom-ipq8064-v1.0.dtsi"
  2. / {
  3. model = "Qualcomm IPQ8064/AP161";
  4. compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
  5. memory@0 {
  6. reg = <0x42000000 0x1e000000>;
  7. device_type = "memory";
  8. };
  9. reserved-memory {
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. ranges;
  13. rsvd@41200000 {
  14. reg = <0x41200000 0x300000>;
  15. no-map;
  16. };
  17. };
  18. aliases {
  19. serial0 = &gsbi4_serial;
  20. mdio-gpio0 = &mdio0;
  21. };
  22. chosen {
  23. stdout-path = "serial0:115200n8";
  24. };
  25. soc {
  26. pinmux@800000 {
  27. i2c4_pins: i2c4_pinmux {
  28. pins = "gpio12", "gpio13";
  29. function = "gsbi4";
  30. bias-disable;
  31. };
  32. spi_pins: spi_pins {
  33. mux {
  34. pins = "gpio18", "gpio19", "gpio21";
  35. function = "gsbi5";
  36. drive-strength = <10>;
  37. bias-none;
  38. };
  39. };
  40. nand_pins: nand_pins {
  41. disable {
  42. pins = "gpio34", "gpio35", "gpio36",
  43. "gpio37", "gpio38";
  44. function = "nand";
  45. drive-strength = <10>;
  46. bias-disable;
  47. };
  48. pullups {
  49. pins = "gpio39";
  50. function = "nand";
  51. drive-strength = <10>;
  52. bias-pull-up;
  53. };
  54. hold {
  55. pins = "gpio40", "gpio41", "gpio42",
  56. "gpio43", "gpio44", "gpio45",
  57. "gpio46", "gpio47";
  58. function = "nand";
  59. drive-strength = <10>;
  60. bias-bus-hold;
  61. };
  62. };
  63. mdio0_pins: mdio0_pins {
  64. mux {
  65. pins = "gpio0", "gpio1";
  66. function = "gpio";
  67. drive-strength = <8>;
  68. bias-disable;
  69. };
  70. };
  71. rgmii2_pins: rgmii2_pins {
  72. mux {
  73. pins = "gpio2", "gpio27", "gpio28",
  74. "gpio29", "gpio30", "gpio31",
  75. "gpio32", "gpio51", "gpio52",
  76. "gpio59", "gpio60", "gpio61",
  77. "gpio62" , "gpio66";
  78. function = "rgmii2";
  79. drive-strength = <8>;
  80. bias-disable;
  81. };
  82. };
  83. };
  84. gsbi@16300000 {
  85. qcom,mode = <GSBI_PROT_I2C_UART>;
  86. status = "okay";
  87. serial@16340000 {
  88. status = "okay";
  89. };
  90. /*
  91. * The i2c device on gsbi4 should not be enabled.
  92. * On ipq806x designs gsbi4 i2c is meant for exclusive
  93. * RPM usage. Turning this on in kernel manifests as
  94. * i2c failure for the RPM.
  95. */
  96. };
  97. gsbi5: gsbi@1a200000 {
  98. qcom,mode = <GSBI_PROT_SPI>;
  99. status = "okay";
  100. spi4: spi@1a280000 {
  101. status = "okay";
  102. spi-max-frequency = <50000000>;
  103. pinctrl-0 = <&spi_pins>;
  104. pinctrl-names = "default";
  105. cs-gpios = <&qcom_pinmux 20 0>;
  106. flash: m25p80@0 {
  107. compatible = "s25fl256s1";
  108. #address-cells = <1>;
  109. #size-cells = <1>;
  110. spi-max-frequency = <50000000>;
  111. reg = <0>;
  112. partitions {
  113. compatible = "qcom,smem";
  114. };
  115. };
  116. };
  117. };
  118. sata-phy@1b400000 {
  119. status = "okay";
  120. };
  121. sata@29000000 {
  122. status = "okay";
  123. };
  124. usb3_0: usb3@110f8800 {
  125. status = "okay";
  126. };
  127. usb3_1: usb3@100f8800 {
  128. status = "okay";
  129. };
  130. pcie0: pci@1b500000 {
  131. status = "okay";
  132. };
  133. pcie1: pci@1b700000 {
  134. status = "okay";
  135. force_gen1 = <1>;
  136. };
  137. pcie2: pci@1b900000 {
  138. status = "okay";
  139. };
  140. nand@1ac00000 {
  141. status = "okay";
  142. pinctrl-0 = <&nand_pins>;
  143. pinctrl-names = "default";
  144. cs0 {
  145. reg = <0>;
  146. compatible = "qcom,nandcs";
  147. nand-ecc-strength = <4>;
  148. nand-bus-width = <8>;
  149. nand-ecc-step-size = <512>;
  150. partitions {
  151. compatible = "qcom,smem";
  152. };
  153. };
  154. };
  155. mdio0: mdio {
  156. compatible = "virtual,mdio-gpio";
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
  160. pinctrl-0 = <&mdio0_pins>;
  161. pinctrl-names = "default";
  162. phy0: ethernet-phy@0 {
  163. reg = <0>;
  164. qca,ar8327-initvals = <
  165. 0x00004 0x7600000 /* PAD0_MODE */
  166. 0x00008 0x1000000 /* PAD5_MODE */
  167. 0x0000c 0x20080 /* PAD6_MODE */
  168. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  169. 0x000e0 0xc74164de /* SGMII_CTRL */
  170. 0x0007c 0x4e /* PORT0_STATUS */
  171. 0x00094 0x4e /* PORT6_STATUS */
  172. >;
  173. };
  174. phy4: ethernet-phy@4 {
  175. reg = <4>;
  176. qca,phy-rgmii-en;
  177. qca,txclk-delay-en;
  178. qca,rxclk-delay-en;
  179. };
  180. phy3: ethernet-phy@3 {
  181. device_type = "ethernet-phy";
  182. reg = <3>;
  183. };
  184. };
  185. gmac0: ethernet@37000000 {
  186. status = "okay";
  187. phy-mode = "rgmii";
  188. qcom,id = <0>;
  189. pinctrl-0 = <&rgmii2_pins>;
  190. pinctrl-names = "default";
  191. mdiobus = <&mdio0>;
  192. fixed-link {
  193. speed = <1000>;
  194. full-duplex;
  195. };
  196. };
  197. gmac1: ethernet@37200000 {
  198. status = "okay";
  199. phy-mode = "rgmii";
  200. qcom,id = <1>;
  201. mdiobus = <&mdio0>;
  202. fixed-link {
  203. speed = <1000>;
  204. full-duplex;
  205. };
  206. };
  207. gmac2: ethernet@37400000 {
  208. status = "okay";
  209. phy-mode = "sgmii";
  210. qcom,id = <2>;
  211. mdiobus = <&mdio0>;
  212. fixed-link {
  213. speed = <1000>;
  214. full-duplex;
  215. };
  216. };
  217. };
  218. };
  219. &adm_dma {
  220. status = "okay";
  221. };