qcom-ipq4018-a42.dts 4.2 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017, Sven Eckelmann <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include "qcom-ipq4019.dtsi"
  18. #include <dt-bindings/gpio/gpio.h>
  19. #include <dt-bindings/input/input.h>
  20. #include <dt-bindings/soc/qcom,tcsr.h>
  21. / {
  22. model = "OpenMesh A42";
  23. compatible = "openmesh,a42";
  24. soc {
  25. rng@22000 {
  26. status = "okay";
  27. };
  28. mdio@90000 {
  29. status = "okay";
  30. };
  31. ess-psgmii@98000 {
  32. status = "okay";
  33. };
  34. tcsr@194b000 {
  35. /* select hostmode */
  36. compatible = "qcom,tcsr";
  37. reg = <0x194b000 0x100>;
  38. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  39. status = "okay";
  40. };
  41. tcsr@1949000 {
  42. compatible = "qcom,tcsr";
  43. reg = <0x1949000 0x100>;
  44. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  45. };
  46. ess_tcsr@1953000 {
  47. compatible = "qcom,tcsr";
  48. reg = <0x1953000 0x1000>;
  49. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  50. };
  51. tcsr@1957000 {
  52. compatible = "qcom,tcsr";
  53. reg = <0x1957000 0x100>;
  54. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  55. };
  56. usb2: usb2@60f8800 {
  57. status = "okay";
  58. };
  59. crypto@8e3a000 {
  60. status = "okay";
  61. };
  62. watchdog@b017000 {
  63. status = "okay";
  64. };
  65. ess-switch@c000000 {
  66. status = "okay";
  67. };
  68. edma@c080000 {
  69. status = "okay";
  70. };
  71. };
  72. keys {
  73. compatible = "gpio-keys";
  74. reset {
  75. label = "reset";
  76. gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  77. linux,code = <KEY_RESTART>;
  78. };
  79. };
  80. aliases {
  81. led-boot = &power;
  82. led-failsafe = &power;
  83. led-running = &power;
  84. led-upgrade = &power;
  85. };
  86. leds {
  87. compatible = "gpio-leds";
  88. red {
  89. label = "a42:red:status";
  90. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  91. linux,default-trigger = "default-off";
  92. };
  93. power: green {
  94. label = "a42:green:status";
  95. gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
  96. };
  97. blue {
  98. label = "a42:blue:status";
  99. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  100. linux,default-trigger = "default-off";
  101. };
  102. };
  103. watchdog {
  104. compatible = "linux,wdt-gpio";
  105. gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  106. hw_algo = "toggle";
  107. /* hw_margin_ms is actually 300s but driver limits it to 60s */
  108. hw_margin_ms = <60000>;
  109. always-running;
  110. };
  111. };
  112. &tlmm {
  113. serial_pins: serial_pinmux {
  114. mux {
  115. pins = "gpio60", "gpio61";
  116. function = "blsp_uart0";
  117. bias-disable;
  118. };
  119. };
  120. spi_0_pins: spi_0_pinmux {
  121. pin {
  122. function = "blsp_spi0";
  123. pins = "gpio55", "gpio56", "gpio57";
  124. drive-strength = <12>;
  125. bias-disable;
  126. };
  127. pin_cs {
  128. function = "gpio";
  129. pins = "gpio54";
  130. drive-strength = <2>;
  131. bias-disable;
  132. output-high;
  133. };
  134. };
  135. };
  136. &blsp_dma {
  137. status = "okay";
  138. };
  139. &blsp1_spi1 {
  140. pinctrl-0 = <&spi_0_pins>;
  141. pinctrl-names = "default";
  142. status = "okay";
  143. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  144. m25p80@0 {
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. compatible = "jedec,spi-nor";
  148. reg = <0>;
  149. spi-max-frequency = <24000000>;
  150. /* partitions are passed via bootloader */
  151. };
  152. };
  153. &blsp1_uart1 {
  154. pinctrl-0 = <&serial_pins>;
  155. pinctrl-names = "default";
  156. status = "okay";
  157. };
  158. &cryptobam {
  159. status = "okay";
  160. };
  161. &gmac0 {
  162. qcom,phy_mdio_addr = <4>;
  163. qcom,poll_required = <1>;
  164. qcom,forced_speed = <1000>;
  165. qcom,forced_duplex = <1>;
  166. vlan_tag = <2 0x20>;
  167. };
  168. &gmac1 {
  169. qcom,phy_mdio_addr = <3>;
  170. qcom,poll_required = <1>;
  171. qcom,forced_speed = <1000>;
  172. qcom,forced_duplex = <1>;
  173. vlan_tag = <1 0x10>;
  174. };
  175. &usb2_hs_phy {
  176. status = "okay";
  177. };
  178. &wifi0 {
  179. status = "okay";
  180. qcom,ath10k-calibration-variant = "OM-A42";
  181. };
  182. &wifi1 {
  183. status = "okay";
  184. qcom,ath10k-calibration-variant = "OM-A42";
  185. };