qcom-ipq4019-a62.dts 4.7 KB

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  1. /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
  2. * Copyright (c) 2017-2018, Sven Eckelmann <[email protected]>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include "qcom-ipq4019.dtsi"
  18. #include <dt-bindings/gpio/gpio.h>
  19. #include <dt-bindings/input/input.h>
  20. #include <dt-bindings/soc/qcom,tcsr.h>
  21. / {
  22. model = "OpenMesh A62";
  23. compatible = "openmesh,a62";
  24. soc {
  25. rng@22000 {
  26. status = "okay";
  27. };
  28. mdio@90000 {
  29. status = "okay";
  30. };
  31. ess-psgmii@98000 {
  32. status = "okay";
  33. };
  34. tcsr@194b000 {
  35. /* select hostmode */
  36. compatible = "qcom,tcsr";
  37. reg = <0x194b000 0x100>;
  38. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  39. status = "okay";
  40. };
  41. tcsr@1949000 {
  42. compatible = "qcom,tcsr";
  43. reg = <0x1949000 0x100>;
  44. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  45. };
  46. ess_tcsr@1953000 {
  47. compatible = "qcom,tcsr";
  48. reg = <0x1953000 0x1000>;
  49. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  50. };
  51. tcsr@1957000 {
  52. compatible = "qcom,tcsr";
  53. reg = <0x1957000 0x100>;
  54. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  55. };
  56. usb2: usb2@60f8800 {
  57. status = "okay";
  58. };
  59. crypto@8e3a000 {
  60. status = "okay";
  61. };
  62. watchdog@b017000 {
  63. status = "okay";
  64. };
  65. ess-switch@c000000 {
  66. switch_lan_bmp = <0x10>;
  67. switch_wan_bmp = <0x20>;
  68. status = "okay";
  69. };
  70. edma@c080000 {
  71. status = "okay";
  72. };
  73. };
  74. keys {
  75. compatible = "gpio-keys";
  76. reset {
  77. label = "reset";
  78. gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  79. linux,code = <KEY_RESTART >;
  80. };
  81. };
  82. aliases {
  83. led-boot = &power;
  84. led-failsafe = &power;
  85. led-running = &power;
  86. led-upgrade = &power;
  87. };
  88. leds {
  89. compatible = "gpio-leds";
  90. red {
  91. label = "a62:red:status";
  92. gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
  93. linux,default-trigger = "default-off";
  94. };
  95. power: green {
  96. label = "a62:green:status";
  97. gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
  98. };
  99. blue {
  100. label = "a62:blue:status";
  101. gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
  102. linux,default-trigger = "default-off";
  103. };
  104. };
  105. watchdog {
  106. compatible = "linux,wdt-gpio";
  107. gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  108. hw_algo = "toggle";
  109. /* hw_margin_ms is actually 300s but driver limits it to 60s */
  110. hw_margin_ms = <60000>;
  111. always-running;
  112. };
  113. };
  114. &tlmm {
  115. serial_pins: serial_pinmux {
  116. mux {
  117. pins = "gpio16", "gpio17";
  118. function = "blsp_uart0";
  119. bias-disable;
  120. };
  121. };
  122. spi_0_pins: spi_0_pinmux {
  123. pin {
  124. function = "blsp_spi0";
  125. pins = "gpio13", "gpio14", "gpio15";
  126. drive-strength = <12>;
  127. bias-disable;
  128. };
  129. pin_cs {
  130. function = "gpio";
  131. pins = "gpio12";
  132. drive-strength = <2>;
  133. bias-disable;
  134. output-high;
  135. };
  136. };
  137. enable-usb-power {
  138. gpio-hog;
  139. gpios = <58 GPIO_ACTIVE_HIGH>;
  140. output-low;
  141. line-name = "enable USB2 power";
  142. };
  143. };
  144. &blsp_dma {
  145. status = "okay";
  146. };
  147. &blsp1_spi1 {
  148. pinctrl-0 = <&spi_0_pins>;
  149. pinctrl-names = "default";
  150. status = "okay";
  151. cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  152. m25p80@0 {
  153. #address-cells = <1>;
  154. #size-cells = <1>;
  155. compatible = "jedec,spi-nor";
  156. reg = <0>;
  157. spi-max-frequency = <24000000>;
  158. /* partitions are passed via bootloader */
  159. };
  160. };
  161. &blsp1_uart1 {
  162. pinctrl-0 = <&serial_pins>;
  163. pinctrl-names = "default";
  164. status = "okay";
  165. };
  166. &cryptobam {
  167. status = "okay";
  168. };
  169. &gmac0 {
  170. qcom,phy_mdio_addr = <3>;
  171. qcom,poll_required = <1>;
  172. qcom,forced_speed = <1000>;
  173. qcom,forced_duplex = <1>;
  174. vlan_tag = <1 0x10>;
  175. };
  176. &usb2_hs_phy {
  177. status = "okay";
  178. };
  179. &pcie0 {
  180. status = "okay";
  181. perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
  182. wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
  183. bridge@0,0 {
  184. reg = <0x00000000 0 0 0 0>;
  185. #address-cells = <3>;
  186. #size-cells = <2>;
  187. ranges;
  188. wifi2: wifi@1,0 {
  189. compatible = "qcom,ath10k";
  190. status = "okay";
  191. reg = <0x00010000 0 0 0 0>;
  192. qcom,ath10k-calibration-variant = "OM-A62";
  193. ieee80211-freq-limit = <5170000 5350000>;
  194. };
  195. };
  196. };
  197. &wifi0 {
  198. status = "okay";
  199. qcom,ath10k-calibration-variant = "OM-A62";
  200. };
  201. &wifi1 {
  202. status = "okay";
  203. qcom,ath10k-calibration-variant = "OM-A62";
  204. ieee80211-freq-limit = <5470000 5875000>;
  205. };