qcom-ipq8064-d7800.dts 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384
  1. #include "qcom-ipq8064-v2.0.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "Netgear Nighthawk X4 D7800";
  5. compatible = "netgear,d7800", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. reserved-memory {
  11. rsvd@5fe00000 {
  12. reg = <0x5fe00000 0x200000>;
  13. reusable;
  14. };
  15. };
  16. aliases {
  17. mdio-gpio0 = &mdio0;
  18. led-boot = &power_white;
  19. led-failsafe = &power_amber;
  20. led-running = &power_white;
  21. led-upgrade = &power_amber;
  22. };
  23. chosen {
  24. bootargs = "rootfstype=squashfs noinitrd";
  25. };
  26. keys {
  27. compatible = "gpio-keys";
  28. pinctrl-0 = <&button_pins>;
  29. pinctrl-names = "default";
  30. wifi {
  31. label = "wifi";
  32. gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  33. linux,code = <KEY_RFKILL>;
  34. debounce-interval = <60>;
  35. wakeup-source;
  36. };
  37. reset {
  38. label = "reset";
  39. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  40. linux,code = <KEY_RESTART>;
  41. debounce-interval = <60>;
  42. wakeup-source;
  43. };
  44. wps {
  45. label = "wps";
  46. gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  47. linux,code = <KEY_WPS_BUTTON>;
  48. debounce-interval = <60>;
  49. wakeup-source;
  50. };
  51. };
  52. leds {
  53. compatible = "gpio-leds";
  54. pinctrl-0 = <&led_pins>;
  55. pinctrl-names = "default";
  56. usb1 {
  57. label = "white:usb1";
  58. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  59. };
  60. usb2 {
  61. label = "white:usb2";
  62. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  63. };
  64. power_amber: power_amber {
  65. label = "amber:power";
  66. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  67. };
  68. wan_white {
  69. label = "white:wan";
  70. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  71. };
  72. wan_amber {
  73. label = "amber:wan";
  74. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  75. };
  76. wps {
  77. label = "white:wps";
  78. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  79. };
  80. esata {
  81. label = "white:esata";
  82. gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
  83. };
  84. power_white: power_white {
  85. label = "white:power";
  86. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  87. default-state = "keep";
  88. };
  89. wifi {
  90. label = "white:wifi";
  91. gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
  92. };
  93. };
  94. };
  95. &qcom_pinmux {
  96. button_pins: button_pins {
  97. mux {
  98. pins = "gpio6", "gpio54", "gpio65";
  99. function = "gpio";
  100. drive-strength = <2>;
  101. bias-pull-up;
  102. };
  103. };
  104. led_pins: led_pins {
  105. mux {
  106. pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
  107. "gpio24","gpio26", "gpio53", "gpio64";
  108. function = "gpio";
  109. drive-strength = <2>;
  110. bias-pull-up;
  111. };
  112. };
  113. usb0_pwr_en_pins: usb0_pwr_en_pins {
  114. mux {
  115. pins = "gpio15";
  116. function = "gpio";
  117. drive-strength = <12>;
  118. bias-pull-down;
  119. output-high;
  120. };
  121. };
  122. usb1_pwr_en_pins: usb1_pwr_en_pins {
  123. mux {
  124. pins = "gpio16", "gpio68";
  125. function = "gpio";
  126. drive-strength = <12>;
  127. bias-pull-down;
  128. output-high;
  129. };
  130. };
  131. };
  132. &sata_phy {
  133. status = "okay";
  134. };
  135. &sata {
  136. status = "okay";
  137. };
  138. &usb3_0 {
  139. status = "okay";
  140. pinctrl-0 = <&usb0_pwr_en_pins>;
  141. pinctrl-names = "default";
  142. };
  143. &usb3_1 {
  144. status = "okay";
  145. pinctrl-0 = <&usb1_pwr_en_pins>;
  146. pinctrl-names = "default";
  147. };
  148. &pcie0 {
  149. status = "okay";
  150. reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
  151. pinctrl-0 = <&pcie0_pins>;
  152. pinctrl-names = "default";
  153. bridge@0,0 {
  154. reg = <0x00000000 0 0 0 0>;
  155. #address-cells = <3>;
  156. #size-cells = <2>;
  157. ranges;
  158. wifi@1,0 {
  159. compatible = "pci168c,0040";
  160. reg = <0x00010000 0 0 0 0>;
  161. nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
  162. nvmem-cell-names = "mac-address", "pre-calibration";
  163. mac-address-increment = <(1)>;
  164. };
  165. };
  166. };
  167. &pcie1 {
  168. status = "okay";
  169. reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
  170. pinctrl-0 = <&pcie1_pins>;
  171. pinctrl-names = "default";
  172. max-link-speed = <1>;
  173. bridge@0,0 {
  174. reg = <0x00000000 0 0 0 0>;
  175. #address-cells = <3>;
  176. #size-cells = <2>;
  177. ranges;
  178. wifi@1,0 {
  179. compatible = "pci168c,0040";
  180. reg = <0x00010000 0 0 0 0>;
  181. nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
  182. nvmem-cell-names = "mac-address", "pre-calibration";
  183. mac-address-increment = <(2)>;
  184. };
  185. };
  186. };
  187. &pcie2 {
  188. status = "okay";
  189. reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
  190. pinctrl-0 = <&pcie2_pins>;
  191. pinctrl-names = "default";
  192. };
  193. &nand {
  194. status = "okay";
  195. pinctrl-0 = <&nand_pins>;
  196. pinctrl-names = "default";
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. nand@0 {
  200. reg = <0>;
  201. compatible = "qcom,nandcs";
  202. nand-ecc-strength = <4>;
  203. nand-bus-width = <8>;
  204. nand-ecc-step-size = <512>;
  205. nand-is-boot-medium;
  206. qcom,boot_pages_size = <0x1180000>;
  207. partitions {
  208. compatible = "fixed-partitions";
  209. #address-cells = <1>;
  210. #size-cells = <1>;
  211. qcadata@0 {
  212. label = "qcadata";
  213. reg = <0x0000000 0x0c80000>;
  214. read-only;
  215. };
  216. APPSBL@c80000 {
  217. label = "APPSBL";
  218. reg = <0x0c80000 0x0500000>;
  219. read-only;
  220. };
  221. APPSBLENV@1180000 {
  222. label = "APPSBLENV";
  223. reg = <0x1180000 0x0080000>;
  224. read-only;
  225. };
  226. art@1200000 {
  227. label = "art";
  228. reg = <0x1200000 0x0140000>;
  229. read-only;
  230. compatible = "nvmem-cells";
  231. #address-cells = <1>;
  232. #size-cells = <1>;
  233. macaddr_art_0: macaddr@0 {
  234. reg = <0x0 0x6>;
  235. };
  236. macaddr_art_6: macaddr@6 {
  237. reg = <0x6 0x6>;
  238. };
  239. precal_art_1000: precal@1000 {
  240. reg = <0x1000 0x2f20>;
  241. };
  242. precal_art_5000: precal@5000 {
  243. reg = <0x5000 0x2f20>;
  244. };
  245. };
  246. artbak: art@1340000 {
  247. label = "artbak";
  248. reg = <0x1340000 0x0140000>;
  249. read-only;
  250. };
  251. kernel@1480000 {
  252. label = "kernel";
  253. reg = <0x1480000 0x0400000>;
  254. };
  255. ubi@1880000 {
  256. label = "ubi";
  257. reg = <0x1880000 0x6080000>;
  258. };
  259. reserve@7900000 {
  260. label = "reserve";
  261. reg = <0x7900000 0x0700000>;
  262. read-only;
  263. };
  264. };
  265. };
  266. };
  267. &mdio0 {
  268. status = "okay";
  269. pinctrl-0 = <&mdio0_pins>;
  270. pinctrl-names = "default";
  271. phy0: ethernet-phy@0 {
  272. reg = <0>;
  273. qca,ar8327-initvals = <
  274. 0x00004 0x7600000 /* PAD0_MODE */
  275. 0x00008 0x1000000 /* PAD5_MODE */
  276. 0x0000c 0x80 /* PAD6_MODE */
  277. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  278. 0x000e0 0xc74164de /* SGMII_CTRL */
  279. 0x0007c 0x4e /* PORT0_STATUS */
  280. 0x00094 0x4e /* PORT6_STATUS */
  281. >;
  282. };
  283. phy4: ethernet-phy@4 {
  284. reg = <4>;
  285. };
  286. };
  287. &gmac1 {
  288. status = "okay";
  289. phy-mode = "rgmii";
  290. qcom,id = <1>;
  291. pinctrl-0 = <&rgmii2_pins>;
  292. pinctrl-names = "default";
  293. nvmem-cells = <&macaddr_art_6>;
  294. nvmem-cell-names = "mac-address";
  295. fixed-link {
  296. speed = <1000>;
  297. full-duplex;
  298. };
  299. };
  300. &gmac2 {
  301. status = "okay";
  302. phy-mode = "sgmii";
  303. qcom,id = <2>;
  304. nvmem-cells = <&macaddr_art_0>;
  305. nvmem-cell-names = "mac-address";
  306. fixed-link {
  307. speed = <1000>;
  308. full-duplex;
  309. };
  310. };
  311. &adm_dma {
  312. status = "okay";
  313. };