qcom-ipq8064-db149.dts 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163
  1. #include "qcom-ipq8064-v1.0.dtsi"
  2. / {
  3. model = "Qualcomm IPQ8064/DB149";
  4. compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
  5. aliases {
  6. serial0 = &gsbi2_serial;
  7. };
  8. reserved-memory {
  9. #address-cells = <1>;
  10. #size-cells = <1>;
  11. ranges;
  12. rsvd@41200000 {
  13. reg = <0x41200000 0x300000>;
  14. no-map;
  15. };
  16. };
  17. };
  18. &qcom_pinmux {
  19. rgmii0_pins: rgmii0_pins {
  20. mux {
  21. pins = "gpio2", "gpio66";
  22. drive-strength = <8>;
  23. bias-disable;
  24. };
  25. };
  26. };
  27. &gsbi2 {
  28. qcom,mode = <GSBI_PROT_I2C_UART>;
  29. status = "okay";
  30. gsbi2_serial: serial@12490000 {
  31. status = "okay";
  32. };
  33. };
  34. &gsbi4 {
  35. status = "disabled";
  36. };
  37. &gsbi4_serial {
  38. status = "disabled";
  39. };
  40. &flash {
  41. m25p,fast-read;
  42. partition@0 {
  43. label = "lowlevel_init";
  44. reg = <0x0 0x1b0000>;
  45. };
  46. partition@1 {
  47. label = "u-boot";
  48. reg = <0x1b0000 0x80000>;
  49. };
  50. partition@2 {
  51. label = "u-boot-env";
  52. reg = <0x230000 0x40000>;
  53. };
  54. partition@3 {
  55. label = "caldata";
  56. reg = <0x270000 0x40000>;
  57. };
  58. partition@4 {
  59. label = "firmware";
  60. reg = <0x2b0000 0x1d50000>;
  61. };
  62. };
  63. &usb3_0 {
  64. status = "okay";
  65. };
  66. &usb3_1 {
  67. status = "okay";
  68. };
  69. &pcie0 {
  70. status = "okay";
  71. };
  72. &pcie1 {
  73. status = "okay";
  74. };
  75. &pcie2 {
  76. status = "okay";
  77. };
  78. &mdio0 {
  79. status = "okay";
  80. pinctrl-0 = <&mdio0_pins>;
  81. pinctrl-names = "default";
  82. phy0: ethernet-phy@0 {
  83. reg = <0>;
  84. qca,ar8327-initvals = <
  85. 0x00004 0x7600000 /* PAD0_MODE */
  86. 0x00008 0x1000000 /* PAD5_MODE */
  87. 0x0000c 0x80 /* PAD6_MODE */
  88. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  89. 0x000e0 0xc74164de /* SGMII_CTRL */
  90. 0x0007c 0x4e /* PORT0_STATUS */
  91. 0x00094 0x4e /* PORT6_STATUS */
  92. >;
  93. };
  94. phy4: ethernet-phy@4 {
  95. reg = <4>;
  96. };
  97. phy6: ethernet-phy@6 {
  98. reg = <6>;
  99. };
  100. phy7: ethernet-phy@7 {
  101. reg = <7>;
  102. };
  103. };
  104. &gmac0 {
  105. status = "okay";
  106. phy-mode = "rgmii";
  107. qcom,id = <0>;
  108. phy-handle = <&phy4>;
  109. pinctrl-0 = <&rgmii0_pins>;
  110. pinctrl-names = "default";
  111. };
  112. &gmac1 {
  113. status = "okay";
  114. phy-mode = "sgmii";
  115. qcom,id = <1>;
  116. fixed-link {
  117. speed = <1000>;
  118. full-duplex;
  119. };
  120. };
  121. &gmac2 {
  122. status = "okay";
  123. phy-mode = "sgmii";
  124. qcom,id = <2>;
  125. phy-handle = <&phy6>;
  126. };
  127. &gmac3 {
  128. status = "okay";
  129. phy-mode = "sgmii";
  130. qcom,id = <3>;
  131. phy-handle = <&phy7>;
  132. };