030-v6.2-0002-ARM-dts-bcm47094-Add-devicetree-for-D-Link-DIR-890L.patch 5.6 KB

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  1. From b1ba87897ceda8e49a47aa92832dd7bff8583e21 Mon Sep 17 00:00:00 2001
  2. From: Linus Walleij <[email protected]>
  3. Date: Mon, 7 Nov 2022 14:41:04 +0100
  4. Subject: [PATCH] ARM: dts: bcm47094: Add devicetree for D-Link DIR-890L
  5. This adds a device tree for the D-Link DIR-890L. This device
  6. is very similar to D-Link DIR-885L, the differences are detailed
  7. as a comment in the DTS file.
  8. Signed-off-by: Linus Walleij <[email protected]>
  9. Link: https://lore.kernel.org/r/[email protected]
  10. Signed-off-by: Florian Fainelli <[email protected]>
  11. ---
  12. arch/arm/boot/dts/Makefile | 1 +
  13. arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts | 211 ++++++++++++++++++
  14. 2 files changed, 212 insertions(+)
  15. create mode 100644 arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
  16. --- a/arch/arm/boot/dts/Makefile
  17. +++ b/arch/arm/boot/dts/Makefile
  18. @@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
  19. bcm4709-tplink-archer-c9-v1.dtb \
  20. bcm47094-asus-rt-ac88u.dtb \
  21. bcm47094-dlink-dir-885l.dtb \
  22. + bcm47094-dlink-dir-890l.dtb \
  23. bcm47094-linksys-panamera.dtb \
  24. bcm47094-luxul-abr-4500.dtb \
  25. bcm47094-luxul-xap-1610.dtb \
  26. --- /dev/null
  27. +++ b/arch/arm/boot/dts/bcm47094-dlink-dir-890l.dts
  28. @@ -0,0 +1,211 @@
  29. +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  30. +/*
  31. + * Device tree for D-Link DIR-890L
  32. + * D-Link calls this board "WRGAC36"
  33. + * this router has the same looks and form factor as D-Link DIR-885L.
  34. + *
  35. + * Some differences from DIR-885L include a separate USB2 port, separate LEDs
  36. + * for USB2 and USB3, a separate VCC supply for the USB2 slot and no
  37. + * router/extender switch is mounted (there is an empty mount point on the
  38. + * PCB) so this device is a pure router. Also the LAN ports are in the right
  39. + * order.
  40. + *
  41. + * Based on the device tree for DIR-885L
  42. + * Copyright (C) 2016 Rafał Miłecki <[email protected]>
  43. + * Copyright (C) 2022 Linus Walleij
  44. + */
  45. +
  46. +/dts-v1/;
  47. +
  48. +#include "bcm47094.dtsi"
  49. +#include "bcm5301x-nand-cs0-bch1.dtsi"
  50. +
  51. +/ {
  52. + compatible = "dlink,dir-890l", "brcm,bcm47094", "brcm,bcm4708";
  53. + model = "D-Link DIR-890L";
  54. +
  55. + chosen {
  56. + bootargs = "console=ttyS0,115200 earlycon";
  57. + };
  58. +
  59. + memory@0 {
  60. + device_type = "memory";
  61. + reg = <0x00000000 0x08000000>,
  62. + <0x88000000 0x08000000>;
  63. + };
  64. +
  65. + leds {
  66. + /*
  67. + * LED information is derived from the boot log which
  68. + * conveniently lists all the LEDs.
  69. + */
  70. + compatible = "gpio-leds";
  71. +
  72. + power-white {
  73. + label = "bcm53xx:white:power";
  74. + gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
  75. + linux,default-trigger = "default-on";
  76. + };
  77. +
  78. + wan-white {
  79. + label = "bcm53xx:white:wan";
  80. + gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
  81. + };
  82. +
  83. + power-amber {
  84. + label = "bcm53xx:amber:power";
  85. + gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
  86. + };
  87. +
  88. + wan-amber {
  89. + label = "bcm53xx:amber:wan";
  90. + gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
  91. + };
  92. +
  93. + usb3-white {
  94. + label = "bcm53xx:white:usb3";
  95. + gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
  96. + trigger-sources = <&xhci_port1>;
  97. + linux,default-trigger = "usbport";
  98. + };
  99. +
  100. + usb2-white {
  101. + label = "bcm53xx:white:usb2";
  102. + gpios = <&chipcommon 15 GPIO_ACTIVE_LOW>;
  103. + trigger-sources = <&ohci_port1>, <&ehci_port1>;
  104. + linux,default-trigger = "usbport";
  105. + };
  106. +
  107. + 2ghz {
  108. + label = "bcm53xx:white:2ghz";
  109. + gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
  110. + };
  111. +
  112. + 5ghz {
  113. + label = "bcm53xx:white:5ghz";
  114. + gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
  115. + };
  116. + };
  117. +
  118. + gpio-keys {
  119. + compatible = "gpio-keys";
  120. +
  121. + button-wps {
  122. + label = "WPS";
  123. + linux,code = <KEY_WPS_BUTTON>;
  124. + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
  125. + };
  126. +
  127. + /* Called "factory reset" in the vendor dmesg */
  128. + button-restart {
  129. + label = "Reset";
  130. + linux,code = <KEY_RESTART>;
  131. + gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
  132. + };
  133. + };
  134. +
  135. + /*
  136. + * The flash memory is memory mapped at 0x1e000000-0x1fffffff
  137. + * 64KB blocks; total size 2MB, same that can be
  138. + * found attached to the spi_nor SPI controller.
  139. + */
  140. + nvram@1e1f0000 {
  141. + compatible = "brcm,nvram";
  142. + reg = <0x1e1f0000 0x00010000>;
  143. +
  144. + et0macaddr: et0macaddr {
  145. + };
  146. + };
  147. +};
  148. +
  149. +&gmac2 {
  150. + /*
  151. + * The NVRAM curiously does not contain a MAC address
  152. + * for et2 so since that is the only ethernet interface
  153. + * actually in use on the platform, we use this et0 MAC
  154. + * address for et2.
  155. + */
  156. + nvmem-cells = <&et0macaddr>;
  157. + nvmem-cell-names = "mac-address";
  158. +};
  159. +
  160. +&spi_nor {
  161. + status = "okay";
  162. +};
  163. +
  164. +&nandcs {
  165. + /* Spansion S34ML01G2, 128MB with 128KB erase blocks */
  166. + partitions {
  167. + compatible = "fixed-partitions";
  168. + #address-cells = <1>;
  169. + #size-cells = <1>;
  170. +
  171. + /*
  172. + * This is called "nflash" in the vendor kernel with
  173. + * "upgrade" and "rootfs" (probably using OpenWrt
  174. + * splitpart). We call it "firmware" like standard tools
  175. + * assume. The CFE loader contains incorrect information
  176. + * about TRX partitions, ignore this, there are no TRX
  177. + * partitions: this device uses SEAMA.
  178. + */
  179. + firmware@0 {
  180. + label = "firmware";
  181. + reg = <0x00000000 0x08000000>;
  182. + };
  183. + };
  184. +};
  185. +
  186. +&usb2 {
  187. + vcc-gpios = <&chipcommon 21 GPIO_ACTIVE_HIGH>;
  188. +};
  189. +
  190. +&usb3 {
  191. + vcc-gpios = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
  192. +};
  193. +
  194. +&usb3_phy {
  195. + status = "okay";
  196. +};
  197. +
  198. +&srab {
  199. + status = "okay";
  200. +
  201. + ports {
  202. + port@0 {
  203. + reg = <0>;
  204. + label = "lan1";
  205. + };
  206. +
  207. + port@1 {
  208. + reg = <1>;
  209. + label = "lan2";
  210. + };
  211. +
  212. + port@2 {
  213. + reg = <2>;
  214. + label = "lan3";
  215. + };
  216. +
  217. + port@3 {
  218. + reg = <3>;
  219. + label = "lan4";
  220. + };
  221. +
  222. + port@4 {
  223. + reg = <4>;
  224. + label = "wan";
  225. + };
  226. +
  227. + port@8 {
  228. + reg = <8>;
  229. + label = "cpu";
  230. + ethernet = <&gmac2>;
  231. + phy-mode = "rgmii";
  232. +
  233. + fixed-link {
  234. + speed = <1000>;
  235. + full-duplex;
  236. + };
  237. + };
  238. + };
  239. +};