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- From: Lorenzo Bianconi <[email protected]>
- Date: Thu, 17 Nov 2022 15:29:53 +0100
- Subject: [PATCH] net: ethernet: mtk_eth_soc: fix RSTCTRL_PPE{0,1} definitions
- Fix RSTCTRL_PPE0 and RSTCTRL_PPE1 register mask definitions for
- MTK_NETSYS_V2.
- Remove duplicated definitions.
- Fixes: 160d3a9b1929 ("net: ethernet: mtk_eth_soc: introduce MTK_NETSYS_V2 support")
- Signed-off-by: Lorenzo Bianconi <[email protected]>
- Signed-off-by: David S. Miller <[email protected]>
- ---
- --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
- +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
- @@ -3241,16 +3241,17 @@ static int mtk_hw_init(struct mtk_eth *e
- return 0;
- }
-
- - val = RSTCTRL_FE | RSTCTRL_PPE;
- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
- regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0);
- -
- - val |= RSTCTRL_ETH;
- - if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
- - val |= RSTCTRL_PPE1;
- + val = RSTCTRL_PPE0_V2;
- + } else {
- + val = RSTCTRL_PPE0;
- }
-
- - ethsys_reset(eth, val);
- + if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1))
- + val |= RSTCTRL_PPE1;
- +
- + ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val);
-
- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
- regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN,
- --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
- +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
- @@ -445,18 +445,14 @@
- /* ethernet reset control register */
- #define ETHSYS_RSTCTRL 0x34
- #define RSTCTRL_FE BIT(6)
- -#define RSTCTRL_PPE BIT(31)
- -#define RSTCTRL_PPE1 BIT(30)
- +#define RSTCTRL_PPE0 BIT(31)
- +#define RSTCTRL_PPE0_V2 BIT(30)
- +#define RSTCTRL_PPE1 BIT(31)
- #define RSTCTRL_ETH BIT(23)
-
- /* ethernet reset check idle register */
- #define ETHSYS_FE_RST_CHK_IDLE_EN 0x28
-
- -/* ethernet reset control register */
- -#define ETHSYS_RSTCTRL 0x34
- -#define RSTCTRL_FE BIT(6)
- -#define RSTCTRL_PPE BIT(31)
- -
- /* ethernet dma channel agent map */
- #define ETHSYS_DMA_AG_MAP 0x408
- #define ETHSYS_DMA_AG_MAP_PDMA BIT(0)
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