an7581-evb-emmc.dts 3.1 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. /dts-v1/;
  3. /* Bootloader installs ATF here */
  4. /memreserve/ 0x80000000 0x200000;
  5. #include <dt-bindings/leds/common.h>
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include "an7581.dtsi"
  8. / {
  9. model = "Airoha AN7581 Evaluation Board";
  10. compatible = "airoha,an7581-evb", "airoha,an7581", "airoha,en7581";
  11. aliases {
  12. serial0 = &uart1;
  13. };
  14. chosen {
  15. bootargs = "console=ttyS0,115200 earlycon";
  16. stdout-path = "serial0:115200n8";
  17. linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>;
  18. };
  19. memory@80000000 {
  20. device_type = "memory";
  21. reg = <0x0 0x80000000 0x2 0x00000000>;
  22. };
  23. };
  24. &en7581_pinctrl {
  25. gpio-ranges = <&en7581_pinctrl 0 13 47>;
  26. mdio_pins: mdio-pins {
  27. mux {
  28. function = "mdio";
  29. groups = "mdio";
  30. };
  31. conf {
  32. pins = "gpio2";
  33. output-high;
  34. };
  35. };
  36. pcie0_rst_pins: pcie0-rst-pins {
  37. conf {
  38. pins = "pcie_reset0";
  39. drive-open-drain = <1>;
  40. };
  41. };
  42. pcie1_rst_pins: pcie1-rst-pins {
  43. conf {
  44. pins = "pcie_reset1";
  45. drive-open-drain = <1>;
  46. };
  47. };
  48. gswp1_led0_pins: gswp1-led0-pins {
  49. mux {
  50. function = "phy1_led0";
  51. pins = "gpio33";
  52. };
  53. };
  54. gswp2_led0_pins: gswp2-led0-pins {
  55. mux {
  56. function = "phy2_led0";
  57. pins = "gpio34";
  58. };
  59. };
  60. gswp3_led0_pins: gswp3-led0-pins {
  61. mux {
  62. function = "phy3_led0";
  63. pins = "gpio35";
  64. };
  65. };
  66. gswp4_led0_pins: gswp4-led0-pins {
  67. mux {
  68. function = "phy4_led0";
  69. pins = "gpio42";
  70. };
  71. };
  72. pwm_gpio18_idx10_pins: pwm-gpio18-idx10-pins {
  73. function = "pwm";
  74. pins = "gpio18";
  75. output-enable;
  76. };
  77. mmc_pins: mmc-pins {
  78. mux {
  79. function = "emmc";
  80. groups = "emmc";
  81. };
  82. };
  83. };
  84. &mmc0 {
  85. pinctrl-names = "default", "state_uhs";
  86. pinctrl-0 = <&mmc_pins>;
  87. pinctrl-1 = <&mmc_pins>;
  88. status = "okay";
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. card@0 {
  92. compatible = "mmc-card";
  93. reg = <0>;
  94. partitions {
  95. compatible = "fixed-partitions";
  96. #address-cells = <1>;
  97. #size-cells = <1>;
  98. bootloader@0 {
  99. label = "bootloader";
  100. reg = <0x00000000 0x00080000>;
  101. };
  102. tclinux@80000 {
  103. label = "tclinux";
  104. reg = <0x00080000 0x02800000>;
  105. };
  106. tclinux_slave@2880000 {
  107. label = "tclinux_slave";
  108. reg = <0x02880000 0x02800000>;
  109. };
  110. rootfs_data@5080000 {
  111. label = "rootfs_data";
  112. reg = <0x5080000 0x00800000>;
  113. };
  114. };
  115. };
  116. };
  117. &i2c0 {
  118. status = "okay";
  119. };
  120. &pcie0 {
  121. pinctrl-names = "default";
  122. pinctrl-0 = <&pcie0_rst_pins>;
  123. status = "okay";
  124. };
  125. &pcie1 {
  126. pinctrl-names = "default";
  127. pinctrl-0 = <&pcie1_rst_pins>;
  128. status = "okay";
  129. };
  130. &eth {
  131. status = "okay";
  132. };
  133. &gdm1 {
  134. status = "okay";
  135. };
  136. &switch {
  137. pinctrl-names = "default";
  138. pinctrl-0 = <&mdio_pins>;
  139. status = "okay";
  140. };
  141. &gsw_phy1 {
  142. pinctrl-names = "led";
  143. pinctrl-0 = <&gswp1_led0_pins>;
  144. status = "okay";
  145. };
  146. &gsw_phy1_led0 {
  147. status = "okay";
  148. };
  149. &gsw_phy2 {
  150. pinctrl-names = "led";
  151. pinctrl-0 = <&gswp2_led0_pins>;
  152. status = "okay";
  153. };
  154. &gsw_phy2_led0 {
  155. status = "okay";
  156. };
  157. &gsw_phy3 {
  158. pinctrl-names = "led";
  159. pinctrl-0 = <&gswp3_led0_pins>;
  160. status = "okay";
  161. };
  162. &gsw_phy3_led0 {
  163. status = "okay";
  164. };
  165. &gsw_phy4 {
  166. pinctrl-names = "led";
  167. pinctrl-0 = <&gswp4_led0_pins>;
  168. status = "okay";
  169. };
  170. &gsw_phy4_led0 {
  171. status = "okay";
  172. };